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Self-heating and trapping enhancements in GaN HEMT models

Self-heating and trapping enhancements in GaN HEMT models
by Don Dingee on 05-02-2024 at 10:00 am

High-fidelity models incorporating real-world, cross-domain effects are essential for accurate RF system simulation. The surging popularity of gallium nitride (GaN) technology in 5G base stations, satellite communication, defense systems, and other applications raises the bar for transistor modeling. Keysight dives deeply into two GaN effects – self-heating and trapping – in enhanced ASM-HEMT 101.4 and MVSG_CMC 3.2.0 GaN HEMT models shipping in the latest release of Advanced Design System (ADS), developed using its advanced parameter extraction package in IC-CAP.

A quick intro to ASM-HEMT and MVSG_CMC

The Compact Model Coalition (CMC), a Silicon Integration Initiative (Si2) working group,  continues refining two industry-leading GaN transistor model specifications, ASM-HEMT and MVSG_CMC.

  • ASM-HEMT (Advanced SPICE Model for High Electron Mobility Transistors) is a computationally efficient, surface-potential-based model for terminal current and charge, accounting for various secondary device effects, including self-heating and trapping.

ASM HEMT parameters

  • MVSG_CMC (MIT Virtual Source GaNFET Compact Model Coalition) is a self-consistent charge-based model with versatile field plate current and charge configurations. It also includes effects like leakage, noise, bias dependencies, and self-heating and trapping.

Both models provide analytical solutions for GaN device behavior that are suitable for accurate simulation in frequency and time domains. They each use an R-C network with thermal resistance and capacitance to model self-heating effects. Both also provide parameter selections for various trapping scenarios, including the latest versions modeled with R-C networks incorporating variable drain-lag and gate-lag.

Self-heating parameter extraction

The increased power density of GaN devices concentrates self-heating in a smaller area, reducing mobility, increasing signal delays, and potentially shortening a device’s lifespan. The extraction of self-heating parameters using IC-CAP is similar for either ASM-HEMT or MVSG_CMC GaN HEMT models.

Modeling thermal resistance RTH0 is effective when using drain current Id with varying drain and gate voltage in static and pulsed stimulation. First, a static Id-Vd curve taken at room temperature provides a baseline. Then, short Id pulses applied with Vd0 and Vg0 held at 0V to minimize trapping and self-heating provide response curves at various temperatures. Overlaying the static curve with the pulsed curves results in intersections where Id is the same. Power is calculated and plotted versus temperature, and the slope of the line is RTH0.

RTH0 extraction

Using the pulsed Id approach provides a more straightforward extraction method than extracting RTH0 from DC static characteristics alone.

Trapping parameter extraction

Trapping effects in GaN devices also factor heavily into performance and reliability. Charge trapping in buffer and interface layers reduces 2DEG channel charge density and dynamic ION, increases dynamic RON and cut-off voltage, and modulates Id.

Again, the methodology for parameter extraction is similar between ASM-HEMT and MVSG_CMC, even with the differences in the implementation of the R-C network between the models. Trapping parameter extraction is done after the DC, IV, thermal, and S-parameter extraction. Gate-lag trapping extraction happens first since it affects the initial transistor response and overall behavior, activating only surface traps. With gate-lag behavior analyzed, drain-lag trapping extraction is more accurate, activating both surface and buffer traps.

ASM-HEMT Trapping Model 4 uses two R-C circuits to model drain-lag and gate-lag.

ASM HEMT trapping model 4

MVSG_CMC Trapping Model 2 uses a similar network with a slightly different physical model, accounting for variable trapping (capture) and de-trapping (emission) time.

MVSG CMC trapping model 2

Parameter extraction pulses Vg while holding Vd constant for gate-lag and pulses Vd while holding Vg constant for drain-lag. A representative drain-lag plot for MVSG-CMC illustrates the difference in capture and emission effects.

MVSG CMC drain lag trapping

IC-CAP keeps pace with the latest GaN HEMT models

The automated parameter extraction flow in IC-CAP simplifies the process for any developer of GaN device models, whether they are a CMC member or not. Keysight’s experience with these industry-leading models also helps IC-CAP customers apply extraction strategies for their process, improving GaN device model fidelity.

IC-CAP also supports ADS users with the latest GaN HEMT models shipped in each successive release. Self-heating and trapping are good examples of adding more complex effects to improve RF circuit simulation results. As the CMC continues improving its models, Keysight keeps pace with tools for foundry and RF design customers.

Further information on the CMC and its upcoming meetings is available at:

https://si2.org/cmc/

Two application notes explain Keysight’s automated parameter extraction strategy for robust GaN HEMT models in more detail:

How to Extract the ASM-HEMT Model for GaN RF Devices Including Thermal Effects

Trapping Extraction of GaN HEMTs

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