Reinventing Power Management ICs for Mobile

Semiconductor startups are becoming rather rare in Silicon Valley, otherwise known as the cradle of technology innovation. In an era where social media and cloud-based software startups are sprouting in every nook and corner of the Valley, it is extremely difficult to get venture capital funding for semiconductor startups, in part due to the high capital investment. Yet there is hope that this may change. The battery-centric power conundrum is now opening up a new window of opportunity for semiconductor startups in the area of space-constrained mobile and wearable devices.

Lion Semiconductor, for instance, is a startup that is trying to reinvent the power management IC (PMIC), one of the biggest chips on a mobile phone. The San Francisco–based company claims to have reduced the PMIC footprint and thickness by two to three times, which, in turn, will allow mobile handset manufacturers to make the battery larger and longer-lasting.

Figure 1: Lion Semiconductor is developing smaller, thinner PMICs for mobile systems

The timing for Lion Semiconductor seems to be just right. Mobile consumables are trending and it is becoming extremely critical to manage the different voltages in devices and to manage the power with minimal energy loss. With increases in design complexity, lower technology process nodes, lower noise thresholds and the increase of analog and RF components in the SoC, there is a growing need for proper generation and control of low voltages without any significant power loss.

The constant overheating issues in smartphones are a testament to how a more innovative PMIC solution could help mobile phone hardware create a better balance between performance and power. In a wearable device, the value proposition of a smaller PMIC is even more crucial: it will lead to a smaller wearable device itself.

Reinventing PMIC
In a mobile handset, the power management IC takes voltage from the battery and delivers it to different chips across the smartphone design footprint. However, the use of discrete components like inductors creates inefficiencies inside the PMIC. The alternatives, like low-drop-out regulators (LDOs), come with lower efficiencies, while the use of switching regulators makes PMICs bulky and expensive.

Lion Semiconductor’s answer to this power puzzle: a new breed of power management ICs that use a different circuit design and manufacturing process to meet the more demanding mobile specifications. The power converter design would not require any discrete passives-like inductors (like LDOs), but would offer the efficiencies of switching regulators, merging the advantages of LDOs and switching regulators.

Lion Semiconductor’s co-founder and CEO, Wonyoung Kim, designed an integrated voltage regulator when he was a graduate student at Harvard University. He was then aiming to create a PMIC that does not require discrete passive components. The firm’s other co-founder, Hanh-Phuc Le, was carrying out similar work at the University of California, Berkeley.

Another Berkeley Ph.D. student, John Crossley, later joined them and a PMIC company specializing in solutions for mobile devices was born. Here, it’s worth noting that the battery in a smartphone has to serve a wide range of input and output voltages, and that it is challenging for the PMIC to maintain high efficiencies across this wide range.

Figure 2: The DC-DC converter chip that Kim developed at Harvard a few years back

Lion Semiconductor is tackling that challenge head-on through their proprietary technologies in circuit design and process technology. Lion Semiconductor has successfully verified several fully-functional silicon prototypes and is preparing to start sampling to customers soon.

Do small design startups also need data management tools?
Kim and his friends at Lion Semiconductor had been using the Cadence Virtuoso analog/mixed-signal design platform since their college days and it was only natural that they turned to Cadence for EDA tools. In addition to other tools, Lion Semiconductor uses ClioSoft’s SOS SoC design data management tool, which is integrated into the Cadence Virtuoso platform.

Figure 3: ClioSoft Inc. authored the chapter on SoC design data management in the “Mixed-signal Methodology Guide” published by Cadence

Does it seem strange for a semiconductor chip startup like Lion Semiconductor to use a sophisticated design data management tool created primarily for the semiconductor industry?

“Not really,” said John Crossley, now Lion Semi’s vice-president of engineering. “It just shows how crucial it is to efficiently manage data in the development of a complex chip. Inevitably, the tight schedules in the mobile world and the very short market windows make it imperative that engineering teams are working on the correct version of design data and that all design team members are in sync.”

The Fremont, California–based ClioSoft helps companies like Lion Semiconductor through a flexible licensing program that features low overhead and greater setup and administration support for startups. The SOS design management platform from ClioSoft has built-in integrations with EDA tools and a flexible architecture, making it easily customizable for small and big semiconductor companies alike for their complex design flows.

Lion Semiconductor is planning to set up a design center overseas, which would make it even more crucial to have an efficient design data management system in place.

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