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Arteris logo bk org rgb
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Virtual Prototype your SoC including FlexNoC

Virtual Prototype your SoC including FlexNoC
by Eric Esteve on 03-12-2012 at 1:10 pm

Designing larger than ever SoC, integrating multiple ARM’s Cortex-A15 and Cortex-A9 microprocessor cores as well as complexes IP functions like HDMI controller, DDR3 Memory controller, Ethernet, SATA or PCI Express controller are pushing designers to search for better price, performance and area tradeoffs and the SoC interconnect… Read More


Synopsys MIPI M-PHY in 28nm introduction with Arteris

Synopsys MIPI M-PHY in 28nm introduction with Arteris
by Eric Esteve on 02-29-2012 at 8:05 am

MIPI set of specifications (supported by dedicated controllers) are completed by a PHY function, the D-PHY or the M-PHY function. The D-PHY was the first to be released, and most of the MIPI functions supported in a smartphone we are using today probably still use a D-PHY, but the latest MIPI specifications have been developed based… Read More


Multicore SoC Architecture Optimization

Multicore SoC Architecture Optimization
by Eric Esteve on 02-16-2012 at 5:36 am

Once again with Synopsys and Arteris, the innovation is coming to solve an issue, faced by their potential customers: “In our research, we’ve found that almost half of project delays are caused by problems with the system architecture design and specification,” said Chris Rommel, vice president, embedded… Read More


Arteris vs Sonics battle: remind Clausewitz!

Arteris vs Sonics battle: remind Clausewitz!
by Eric Esteve on 01-29-2012 at 1:56 pm

I have bloggedbefore Christmas about the Arteris-Sonics war, initiated by Sonics, claiming that Arteris NoC IP product was infringing Sonics patent. We had shown in this post that the architecture of Sonics interconnects IP product was not only older but also different from Arteris’ NoC architecture: the products launched … Read More


NoC for faster SoC integration

NoC for faster SoC integration
by Eric Esteve on 01-19-2012 at 5:32 am

The need for Network-on-Chip (NoC) has appeared at the time where chip makers realized that they could really integrate a complete system on a single die to build a System-on-Chip (SoC). I was in charge of the development of a large IC, integrating different type of functions (Analog and Digital) to support advanced TV application.… Read More


How to use NoC to avoid routing congestion

How to use NoC to avoid routing congestion
by Eric Esteve on 11-23-2011 at 5:21 am

Network-on-Chip (NoC) is an emerging paradigm for communications within large VLSI systems implemented on a single silicon chip. Sgroi et al. call “the layered-stack approach to the design of the on-chip intercore communications the Network-on-Chip (NOC) methodology.” In a NoC system, modules such as processorRead More


Arteris vs Sonics battle…Let’s talk NoC architecture

Arteris vs Sonics battle…Let’s talk NoC architecture
by Eric Esteve on 11-04-2011 at 6:23 am

The text of this very first article about Arteris had disapeared from Semiwiki, for an absolutely unknowed reason…If you have missed it, this is a pretty useful introduction to NoC concept, as well as to the legal battle between Arteris and Sonics:

The Network on Chip is a pretty recent concept. Let’s try to understand how … Read More