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Qualcomm Intel Facebook and Semiconductor IP

Qualcomm Intel Facebook and Semiconductor IP
by Daniel Nenni on 03-20-2019 at 12:00 am

Image RemovedWhat does Qualcomm, Intel, and Facebook have in common? Well, for one thing they all bought network onchip communications (NoC) IP companies. As I have mentioned before, semiconductor IP is the foundation of the fabless semiconductor ecosystem and I believe this trend of acquisitions will continue. So, if you are… Read More


Sonics opens new strategy for SoC energy processing

Sonics opens new strategy for SoC energy processing
by Don Dingee on 05-09-2016 at 4:00 pm

Back in February when we shared the Sonics philosophy on the ICE-Grain Power Architecture for hardware-based SoC power management, I speculated we’d know more by DAC 2016. Sonics is hitting the road with a new live seminar coming to Silicon Valley this month and Austin during DAC – and the news is big.… Read More


Optimizing memory scheduling at integration-level

Optimizing memory scheduling at integration-level
by Don Dingee on 04-04-2016 at 4:00 pm

In our previous post on SoC memory resource planning, we shared 4 goals for a solution: optimize utilization and QoS, balance traffic across consumers and channels, eliminate performance loss from ordering dependencies, and analyze and understand tradeoffs. Let’s look at details on how Sonics is achieving this.… Read More


4 goals of memory resource planning in SoCs

4 goals of memory resource planning in SoCs
by Don Dingee on 03-21-2016 at 4:00 pm

The classical problem every MBA student studies is manufacturing resource planning (MRP II). It quickly illustrates that at the system level, good throughput is not necessarily the result of combining fast individual tasks when shared bottlenecks and order dependency are involved. Modern SoC architecture, particularly … Read More


SoC power management a study in transition latency

SoC power management a study in transition latency
by Don Dingee on 02-22-2016 at 4:00 pm

Apple’s recent bout with ‘Batterygate’ highlighted just how important dynamic power management can be. Our last Sonics update looked at using their NoC to manage power islands; this time, we look at their research progress on architectural measures for power management.… Read More


Networking through dark silicon power islands

Networking through dark silicon power islands
by Don Dingee on 12-27-2015 at 7:00 am

For decades, tracing back to the days of Deming, the way to tackle complex engineering problems has been the pareto chart. Charting conditions and their contribution to the problem leads to mitigation priorities.

In the case of SoC power management, the old school pareto chart said the processor core was the biggest power hog and… Read More


Finding under- and over-designed NoC links

Finding under- and over-designed NoC links
by Don Dingee on 11-24-2015 at 12:00 pm

When it comes to predicting SoC performance in the early stages of development, most designers rely on simulation. For network-on-chip (NoC) design, two important factors suggest that simulation by itself may no longer be sufficient in delivering an optimized design.

The first factor is use cases. I think I’ve told the story … Read More


Maybe Clockless Chip Design’s Time has Come

Maybe Clockless Chip Design’s Time has Come
by Tom Simon on 11-16-2015 at 4:00 pm

There have always been novel technologies vying to compete with conventional design practices. It is hit or miss on the success of these ideas. In the 90’s I recall speaking to someone who was convinced that they could effectively build computers based on multilevel logic. This, as we know did not pan out. But there have been many … Read More


To err is runtime; to manage, NoC

To err is runtime; to manage, NoC
by Don Dingee on 10-27-2015 at 12:00 pm

Software abstraction is a huge benefit of a network-on-chip (NoC), but with flexibility comes the potential for runtime errors. Improper addresses and illegal commands can generate unexpected behavior. Timeouts can occur on congested paths. Security violations can arise from oblivious or malicious access attempts.

Runtime… Read More