WP_Term Object
    [term_id] => 77
    [name] => Sonics
    [slug] => sonics
    [term_group] => 0
    [term_taxonomy_id] => 77
    [taxonomy] => category
    [description] => 
    [parent] => 14433
    [count] => 49
    [filter] => raw
    [cat_ID] => 77
    [category_count] => 49
    [category_description] => 
    [cat_name] => Sonics
    [category_nicename] => sonics
    [category_parent] => 14433

Opportunity NoCs, But Not Without Software

Opportunity NoCs, But Not Without Software
by Paul McLellan on 07-06-2015 at 12:29 pm

 It is easy to think that semiconductor IP is all about structures on the silicon. After all, there is “semiconductor” in the phrase “semiconductor IP”. But increasingly the heart is actually software. Sonics’ SGN product is a network-on-chip but to build it you need to use the software that actually builds it, which is called SonicsStudio Director.

Just before DAC, Sonics released a new version. It has been put together to support both novices and power users. Easy to get started but also with the features needed to get the most out of designers who understand all the details of SonicsGN. When SoCs can contain hundreds of blocks, in multiple power and clock domains, building an NoC is not straightforward. And that is before you worry about the fact that the NoC has to run at a GHz and the whole chip isn’t allowed to consume too much power. The NoC is a crucial part of building a successful chip. More and more of the chip is 3rd party IP (or from a group in the same company in, say, India, which is not that different from a 3rd party) and making an SoC is linking all that barely-understood stuff together. That is where NoCs come in. And not just NoCs but the software that allows you to describe it all. Like I said, it is not just the stuff on the chip it is the software that allows you to design it.

So what does Studio Director do? It lets you specify all the blocks on the chip and how you want them to communicate. Then it lets you check you didn’t screw up. You can check it, simulate it and more.

  • Design
  • Power
  • Lint
  • RTL generation
  • RLT simulation
  • SystemC generation
  • SystemC simulation
  • Synthesis constraint generation
  • IP-XACT generation

If you have a NoC then you want to know all sorts of stuff at different levels. At the high level what is the overall bandwidth. At the low level, how long does this block take to communicate with this other block. And everything in-between.

That’s where StudioDirector comes in. It let’s you ask all those questions without having to build the chip and do it through RTL simulation or something barely practical. You put the NoC together and then you find out whether it actually does all the things you need. QoR stands for Quality-of-Results but it is a catchword for whether or not what you have done is good enough for the design. Whether it is a good balance of performance, power, area and everything else.

Since the NoC involves pretty much every block on the chip. alternatives are the same. Simulate all the blocks. Or STA all the blocks. Or whatever. Not a trivial task and involving expensive tool licenses. Multiple clocks. Voltage islands. Power down. A modern SoC is not like when I started in this industry and a 10K gate design with a single clock running at 3V was the limit of what anyone did. We hadn’t even got to CMOS.

So what does the latest version of StudioDirector give you:

  • Schematic and context-sensitive text editor
  • Real-time feedback for quick-fix
  • Excel-like spreadsheet for import/export
  • Full Tcl support


There are no comments yet.

You must register or log in to view/post comments.