Cadence® Janus™ Network-on-Chip (NoC)

Cadence® Janus™ Network-on-Chip (NoC)
by Kalar Rajendiran on 07-23-2024 at 10:00 am

Design Flow when using Janus NoC

A Network-on-Chip (NoC) IP addresses the challenges of interconnect complexity in SoCs by significantly reducing wiring congestion and providing a scalable architecture. It allows for efficient communication among numerous initiators and targets with minimal latency and high speed. A NoC facilitates design changes, enabling… Read More


Automotive Designs Have No Room for Error!

Automotive Designs Have No Room for Error!
by Daniel Nenni on 07-02-2024 at 6:00 am

Automotive electronics

Automotive designs demand a high level of fault tolerance, and one of the methods to achieve this is to use error correcting codes (ECC). This Wikipedia page ECC Memory gives a flavor, though that article concentrates on memory and we are interested in wider applications using a form of forward error correction. This technique … Read More


NoCs give architects flexibility in system-in RISC-V design

NoCs give architects flexibility in system-in RISC-V design
by Don Dingee on 11-16-2023 at 6:00 am

Power domains and crossings into NoC for system in RISC V design

RISC-V tends to generate excitement over the possibilities for the processor core, any custom instruction extensions, and its attached memory subsystem. Those are all necessary steps to obtaining system-level performance. But is that attention sufficient? Architects who have ventured into larger system-on-chip (SoC) … Read More


Truechip Introduces Automation Products – NoC Verification and NoC Performance

Truechip Introduces Automation Products – NoC Verification and NoC Performance
by Kalar Rajendiran on 11-07-2022 at 10:00 am

Truechip NoC Automation Product

While Truechip has established itself as a global provider of verification IP (VIP) solutions, they are always on the lookout for strategic IP needs from their customer base. Over the last several years, a solid market for Network-on-Chip (NoC) IP has grown, driven by the need to rapidly move data across a chip. Concurrently, the… Read More


Truechip’s Network-on-Chip (NoC) Silicon IP

Truechip’s Network-on-Chip (NoC) Silicon IP
by Kalar Rajendiran on 06-14-2022 at 10:00 am

Truechip NoC Silicon IP Block Diagram

Driven by the need to rapidly move data across a chip, the NoC IP is already a very common structure for moving data with an SoC. And various implementations of the NoC IP are available in the market depending on the end system requirements. Over the last few years, the RISC-V architecture and the TileLink interface specification … Read More


Benefits of a 2D Network On Chip for FPGAs

Benefits of a 2D Network On Chip for FPGAs
by Tom Simon on 04-12-2022 at 10:00 am

Achronix FPGA 2D NoC

The reason people love FPGAs for networking and communications applications is because they offer state of the art high speed interfaces and impressive parallel processing power. The problem is that typically a lot of the FPGA fabric resources are used simply to move the data on or off and across the chip. Achronix has cleverly … Read More


2D NoC Based FPGAs Valuable for SmartNIC Implementation

2D NoC Based FPGAs Valuable for SmartNIC Implementation
by Tom Simon on 12-29-2021 at 6:00 am

2D NoC SmartNIC

Smart network interface cards (SmartNICs) have proven themselves valuable in improving network efficiency. According to Scott Schweitzer, senior product manager at Achronix, it has been shown that SmartNICs can relieve up to – and perhaps beyond – 30% of the host processor’s loading. SmartNICs started out taking… Read More


Webinar: Challenges in creating large High Performance Compute SoCs in advanced geometries

Webinar: Challenges in creating large High Performance Compute SoCs in advanced geometries
by Daniel Nenni on 05-17-2021 at 6:00 am

Sondrel Webinar 1

When we think about Compute and AI SoCs, we often focus on the huge numbers of calculations being carried out every second, and the ingenious IPs that are able to reach such high levels of performance. However, there also exists a significant challenge in keeping the vast quantities of data flowing around the chip which is solved … Read More


Achronix Talks about FPGAs for Video Processing

Achronix Talks about FPGAs for Video Processing
by Tom Simon on 12-15-2020 at 10:00 am

Need for Video Editing

The internet keeps adding users and connected devices. According to the numbers in a white paper from Achronix, by 2022 there will be 4.8 billion internet users and 28.5 billion connected devices. Internet traffic will reach 275 exabytes per month. Of this a staggering 83 percent will be video traffic. Moving the data from creators… Read More


Interconnect Basics: Wires to Crossbar to NoC

Interconnect Basics: Wires to Crossbar to NoC
by Bernard Murphy on 08-18-2020 at 6:00 am

rats nest min

To many of us, if we ever think about interconnect on an SoC, we may think delay, power consumption, congestion, that sort of thing. All important points from an implementation point of view, but what about the functional and system implications? In the early days, interconnect was very democratic, all wires more or less equal, … Read More