Arteris provides Network-on-Chip (NoC) interconnect semiconductor intellectual property (IP) to System on Chip (SoC) makers so they can reduce cycle time, increase margins, and easily add functionality. Arteris invented the industry’s first commercial network on chip (NoC) SoC interconnect IP solutions and is the industry leader. Unlike traditional solutions, Arteris interconnect plug-and-play technology is flexible and efficient, allowing designers to optimize for throughput, power, latency and floorplan.
Arteris is different because we were founded by networking experts who applied their knowledge to the problems of SoC development. As SoC makers added more IP blocks to chips, traditional bus and crossbar means to communication became very inefficient, resulting in serious pain to architects, designers, and integrators: Massive numbers of wires, failed timing closure, increased heat and power consumption, and spaghetti-like routing congestion leading to increased die area. These problems were compounded when there were IP changes late in the design cycle or when management expected the next derivative version of the chip to be on time and risk free because only a few IP blocks were changed.
Arteris On-Chip Interconnect Technology
The Arteris Network-on-Chip (NoC) architecture borrows concepts from the computer networking arena and adapts them to system-on-chip design constraints. The network on chip solution optimizes performance, silicon area, and power, and reflects an in-depth understanding and integration of the constraints imposed by SoC implementations and semiconductor processes. By removing the inherent architectural limitations of traditional interconnect solutions, Arteris Network-on-Chip semiconductor IP offers a quantum leap in design quality and productivity, allowing SoC designers to achieve their ultimate design goals faster, easier and with less cost.
Arteris pioneered the first commercial NoC SoC offering, led the mass market adoption of Network-on-Chip solutions, and is the market leader in this space. There have been over 190 tapeouts of systems-on-chip using Arteris network-on-chip interconnect IP, resulting in over 2 Billion chips shipped.
Key benefits of Arteris network-on-chip interconnect solutions include:
- Improved performance, power and silicon area
- Highly scalable to support a wide range of performance and complexity levels
- Easy-to-use solution for simple designs with a handful of IPs to complex SoCs with hundreds of IPs
- Plug-and-Play with IP using any transaction protocol – no IP lock-in
- Shortened development times with advanced tool suite and architecture features
- Architect-centric tools allow architects to increase their efficiency and value-add to the entire design team
- Providing certainty in tape out schedule by allowing faster and easier verification and timing closure
Arteris operates globally with headquarters in Campbell, California, in the heart of Silicon Valley. Arteris is a private company.
About Arteris IP
Arteris IP provides network-on-chip (NoC) interconnect IP to accelerate system-on-chip (SoC) semiconductor assembly for a wide range of applications from AI to automobiles, mobile phones, IoT, cameras, SSD controllers, and servers for customers such as Baidu, Mobileye, Samsung, Huawei / HiSilicon, Toshiba and NXP. Arteris IP products include the Ncore® cache coherent and FlexNoC® non-coherent interconnect IP, the CodaCache® standalone last level cache, and optional Resilience Package (ISO 26262 functional safety), FlexNoC AI Package, and PIANO®automated timing closure capabilities. Customer results obtained by using Arteris IP products include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs.
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