PDF Solutions Adds Security and Scalability to Manufacturing and TestEveryone knows design complexity is exploding. What used…Read More
Revolutionizing Processor Design: Intel's Software Defined Super CoresIn the ever-evolving landscape of computing, Intel's patent…Read More
TSMC's 2024 Sustainability Report: Pioneering a Greener Semiconductor FutureTSMC, the world's most trusted semiconductor foundry, released…Read More
Intel's Commitment to Corporate Responsibility: Driving Innovation and SustainabilityIntroduction by Lip-BU Tan: I’m an engineer at…Read More
Cadence's Strategic Leap: Acquiring Hexagon's Design & Engineering BusinessIn a bold move that underscores the accelerating…Read More
I first met Betty Pokerwinski of Qualcomm at LinkedIn in the group called IC Layout Designers. I post frequently on LinkedIn and a blog article on an EDA tool called Visual Design Diff from ClioSoft created quite a discussion, enough so that I contacted Betty to learn more about her IC layout group at Qualcomm.
Questions and Answers… Read More
Part I (here) looked at a bit of the history of scripting, makefiles and other approaches to more formally specify and institutionalize EDA design flows.
The most sophisticated tool I know that looks at this issue is RTDA’s FlowTracer.… Read More
As Apple begins to flood the market with a full line of mobile devices sporting 4G LTE communications capability, starting with the iPAD and soon to follow with Ivy Bridge based MAC Book Pros and then in the Fall with iPhone 5s, one has to ask will the carriers be able to keep pace in order for customers to have a satisfied user experience.… Read More
These days, the flows that are used to build semiconductor designs are rightly regarded as part of the intellectual property of the company that developed and used them.
But it didn’t always used to be that way.… Read More
Keynote #2 at SNUG 2012 was John Cornish, VP Marketing at ARM. Why they sent a marketing person to speak in front of 2,000+ engineers I do not know. To top that, next time they should send a sales person and do a real dog and pony show. To find out more about John I checked his LinkedIn profile which was bare. So enough about John, lets hit … Read More
SNUG Chairman John Busco opened the session with a few words about Aart de Geus, the silver anniversary of Synopsys, and some SNUG statistics. A whopping 2,500 people registered this year! Probably due to the Magma acquisition which is prominently displayed on “Welcome Magma Users” signs and on the flat screens which are everywhere.… Read More
Before I get too snarky here, I would like to thank Synopsys for the invitation to SNUG 2012 and including me with the professional editors at a 75 minute roundtable discussion with Synopsys CEO Aart de Geus. While Aart is not my favorite big EDA CEO (Wally Rhines of Mentor bought me lunch and returns my email), he is definitely the most… Read More
And no red and green glasses required.
I remember the first time I heard about a Through Silicon Via (TSV), punching a hole through the entire wafer to make an electrical connection at the back, like we do all the time in printed circuit boards with through plated holes. I thought someone was trying one on and trying to make me look a fool.… Read More
Lip-Bu Tan, the CEO of Cadence, has been named by the Singapore Business Awards as Outstanding CEO (overseas) last week. These awards were launched in 1985 by the Business Times and DHL, so this year is the 27th year of the award, created to recognize business leaders in Singapore and abroad.
As it happens, Cadence flew me first class… Read More
Interesting article from Joel Hruska on ExtremeTech: Nvidia deeply unhappy with TSMC, claims 22nm essentially worthless . The title is a bit dramatic (poetic license) but the charts are accurate to the degree that 20nm costs will be significantly higher from the start and will continue to be higher throughout production and maturity.… Read More
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MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power Efficiency