Interview with David Tester VP of Engineering Mach42

David Tester is the VP of Engineering at Mach42, with 30 years of experience in semiconductor development, engineering leadership, and business growth. As Chief Engineer at EnSilica, he helped transform the company from a design consultancy into a publicly listed fabless semiconductor business, scaling the organisation to more than 200 employees and delivering automotive-grade products to global markets. Previously, he founded Air Semiconductor, raising $10 million in venture funding and leading development of the world’s first embedded GPS receiver for digital cameras. David is a Fellow of the IET, a Chartered Engineer, and inventor on 20 granted patents.

What brought you to Mach42?

For many years, analog IC design has used modelling languages such as Verilog-A to create first-order models of analog blocks and analog subsystems in top-down methodologies before detailed circuit design starts.  Often timescale pressures mean these models are either not maintained, or they don’t model the detailed behaviour of completed circuits. As a result, subsystem and full-chip functional simulations are run with every circuit using the pre-layout schematic views of the design, resulting in detailed and accurate, but slow, simulations limiting the scope of these essential simulations.

Following layout, the gulf between these hand-written Verilog-A models and the post-layout extracted view of circuits can be even wider. Those all-important full-chip signoff simulations using extracted views become ever closer to the performance which will be seen post-silicon in the lab, but simulation run-times slow even further.

Mach42 is pursuing a different approach and advocating that circuit design is followed by complete use of the hand-written Verilog-A model replaced by a machine-generated neural network model, whose behaviour has been trained by the schematic circuit simulations.  This model simulates with less compute than the schematic view of the circuit, but it retains the actual detailed circuit behaviour, with accuracy within a few percent of the actual design.  With post-layout extracted views, these modelling gains become ever more significant.

As a result, the Mach42 models generated by ML are just as accurate as transistor-level simulations, but they simulate orders of magnitude faster, enabling design teams to drastically increase the number and complexity of their chip sign-off simulations. This ingenuity is the reason I joined Mach42.

 What is the biggest challenge your customer is facing?

The biggest challenge is product complexity and the risks associated with bringing products to market against challenging timescales. This is definitely not a new problem; it’s a problem which already existed at the start of my career 30 years ago!  However, product complexity is so challenging now that the impact of silicon respins can devastate the commercial case for many products.

Why is your approach to solving this problem unique?

Mach42 is bringing machine learning and fast neural network surrogates into the modelling of analog IC designs, combining ML technologies, which have already been proven in other markets, into analog IC design.

What other approaches are being used to solve this problem?

Brute force, usually.  Too often the conflict between product development timescales and circuit simulations needed to evidence that specifications are met is addressed by limiting the ambition of these all-important signoff level simulations and increasing pre-silicon risks.  Where greater CPU compute power can be applied, it often is, but running these simulations 100% at transistor-level is a huge compute task and those simulations are often already running on machines with the best CPU’s and plenty of memory.

We have a different perspective.  We believe the best place to find problems is pre-silicon, and the ambitions for pre-tapeout simulations should be increasing not decreasing, but without compromising accuracy of simulations results.

What challenges will your customers face in the near future?

The challenges mentioned will all apply to our customers. The combination of product complexity and challenging development timelines can create a perfect storm, with pressures to decrease the scope and ambitions for pre-manufacture simulations of these products.  Experience has proven time and time again: the best way to de-risk developments and launch products on schedule is to increase the scope of pre-silicon simulations, not decrease it. That’s the end-user problem Mach42 is solving.

How has AI changed your business strategy?

We are delivering infrastructure that enables existing and future AI based orchestration solutions to explore designs in much greater depth and far more extensive coverage within shorter time frames, lowering technical and financial risk and time to market. Leveraging artificial intelligence and machine learning is key to this work.

Contact Mach42

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