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Complete Schedule of Synopsys 2013 DAC Events, Panels & Paper Participation (Free Food!)

Complete Schedule of Synopsys 2013 DAC Events, Panels & Paper Participation (Free Food!)
by Daniel Nenni on 05-19-2013 at 9:01 pm

 Funny story, @ #49DAC I saw Aart with a very relaxed look on his face looking at the exhibit hall and in my mind he was thinking, “Mine, all mine!” But I digress……. Synopsys is the #1 EDA company for a reason and here is the supporting data for that hypothesis:

Synopsys is committed to accelerating Innovation for its customers—it’s been at the core of the company’s DNA for more than 25 years. The world’s leading semiconductor and electronics companies have relied on Synopsys’ comprehensive portfolio of integrated, system-level implementation, verification, IP, manufacturing and FPGA solutions to design their products. Meet with members of the Synopsys team at DAC to learn more about the newest solutions available to help accelerate innovation.

Visit booth #947
to see Synopsys’ technology exhibits including the HAPS family of FPGA-based prototyping solutions, and the company’s comprehensive functional verification solutions. If you are interested in a specific topic, Synopsys experts will be available for one-on-one meetings during the show.

[TABLE] align=”center” border=”1″ style=”width: 500px”
|-
| colspan=”4″ style=”width: 684px; height: 33px” | SUNDAY, JUNE 2
|-
| style=”width: 223px; height: 19px” | Event
| style=”width: 156px; height: 19px” | Time
| style=”width: 132px; height: 19px” | Location
| style=”width: 174px; height: 19px” | Additional Information
|-
| style=”width: 223px; height: 19px” | Workshop 4
Low-Power Design with the New IEEE 1801-2013 Standard
| style=”width: 156px; height: 19px” | 1:00 p.m. – 5:00 p.m.
| style=”width: 132px; height: 19px” | Austin Convention Center, Room 18C
| style=”width: 174px; height: 19px” | Speaker: Jeffrey Lee, Synopsys
|-
| style=”width: 223px; height: 33px” | MONDAY, JUNE 3
| style=”width: 156px; height: 33px” |
| style=”width: 132px; height: 33px” |
| style=”width: 174px; height: 33px” |
|-
| style=”width: 223px; height: 19px” | Event
| style=”width: 156px; height: 19px” | Time
| style=”width: 132px; height: 19px” | Location
| style=”width: 174px; height: 19px” | Additional Information
|-
| style=”width: 223px; height: 58px” | ARM-TSMC-Synopsys Breakfast
Optimizing Implementation of Performance- and Power-Balanced Processor Cores
| style=”width: 156px; height: 58px” | 7:15 a.m. – 8:45 a.m.
| style=”width: 132px; height: 58px” | Hilton Hotel, 6th Floor, Grand Ballroom H
| style=”width: 174px; height: 58px” | RSVP Required
|-
| style=”width: 223px; height: 58px” | AMS Verification Luncheon
Advance Your Mixed-signal Verification Techniques to the Next Level
| style=”width: 156px; height: 58px” | 11:30 a.m. – 1:30 p.m.
| style=”width: 132px; height: 58px” | Hilton Hotel, 6th Floor, Grand Ballroom G
| style=”width: 174px; height: 58px” | RSVP Required
|-
| style=”width: 223px; height: 58px” | IC Compiler Luncheon
The Many Faces of Advanced Technology
| style=”width: 156px; height: 58px” | 11:30 a.m. – 1:30 p.m.
| style=”width: 132px; height: 58px” | Hilton Hotel, 6th Floor, Grand Ballroom H
| style=”width: 174px; height: 58px” | RSVP Required
|-
| style=”width: 223px; height: 58px” | Pavilion Panel
Affiliation Avenue: The Road to Success
| style=”width: 156px; height: 58px” | 1:30 p.m. – 2:30 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 509
| style=”width: 174px; height: 58px” | Moderator: Sashi Oblisetty, Synopsys
|-
| style=”width: 223px; height: 58px” | GlobalFoundries Theater
Foundry Reference Flow Ecosystem Empowers Designers to Achieve Aggressive Time-to-Market Challenges
| style=”width: 156px; height: 58px” | 1:45 p.m. – 2:00 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 1314 Theater
| style=”width: 174px; height: 58px” |
|-
| style=”width: 223px; height: 58px” | Customer Insight Sessions
Success with Synopsys’ Galaxy Implementation Platform
| style=”width: 156px; height: 58px” | 2:00 p.m. & 3:00 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Level 3, Room 10B
| style=”width: 174px; height: 58px” | Speakers:
2:00 p.m. – Yongjoo Jeon, Samsung
3:00 p.m. – Michael V. Leuzze, LSI
RSVP Required
|-
| style=”width: 223px; height: 58px” | GlobalFoundries Theater
Xceptional IP for GlobalFoundries 14nm-XM Technology
| style=”width: 156px; height: 58px” | 2:00 p.m. – 3:00 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 1314 Theater
| style=”width: 174px; height: 58px” |
|-
| style=”width: 223px; height: 58px” | Samsung Theater
Galaxy Innovations and Collaboration with Samsung for 14-nm FinFET Success
| style=”width: 156px; height: 58px” | 4:30 p.m. – 4:45 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 915 Theater
| style=”width: 174px; height: 58px” |
|-
| style=”width: 223px; height: 55px” | PrimeTime SIG Dinner
Technology Panel – Advanced ECO Methodology
| style=”width: 156px; height: 55px” | 6:00 p.m. – 9:30 p.m.
| style=”width: 132px; height: 55px” | Brazos Hall 204 E 4th St
| style=”width: 174px; height: 55px” | RSVP Required
|-
| colspan=”4″ style=”width: 684px; height: 33px” | TUESDAY, JUNE 4
|-
| style=”width: 223px; height: 19px” | Event
| style=”width: 156px; height: 19px” | Time
| style=”width: 132px; height: 19px” | Location
| style=”width: 174px; height: 19px” | Additional Information
|-
| style=”width: 223px; height: 58px” | Partner Breakfast with GlobalFoundries and Synopsys
Deploying 14XM FinFETs in Your Next Mobile SoC Design
| style=”width: 156px; height: 58px” | 7:15a.m. – 8:45 a.m.
| style=”width: 132px; height: 58px” | Hilton Hotel, 6th Floor, Grand Ballroom G
| style=”width: 174px; height: 58px” | RSVP Required
|-
| style=”width: 223px; height: 58px” | Keynote Visionary Talk
Massive Innovation and Collaboration in the
“GigaScale” Age!
| style=”width: 156px; height: 58px” | 9:15 a.m. – 9:30 a.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Ballroom ABC
| style=”width: 174px; height: 58px” | Speaker: Aart de Geus, Synopsys Chairman and co-CEO
|-
| style=”width: 223px; height: 58px” | Customer Insight Sessions
Success with Synopsys’ Galaxy Implementation Platform
| style=”width: 156px; height: 58px” | 10:00 a.m. & 2:00 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Level 3, Room 10B
| style=”width: 174px; height: 58px” | Speakers:
10:00 a.m. – Martin Foltin, HP
2:00 p.m. – Tim Whitfield, ARM
RSVP Required
|-
| style=”width: 223px; height: 55px” | Paper Session 4.1
Double-Patterning Lithography-Aware Analog Placement
| style=”width: 156px; height: 55px” | 10:30 a.m. – 12:00 p.m.
| style=”width: 132px; height: 55px” | Austin Convention Center, Room 13AB
| style=”width: 174px; height: 55px” | Speakers: Tung-Chieh Chen, and
Ta-Yu Kuan, Synopsys
|-
| style=”width: 223px; height: 55px” | DAC Management Day 2013
| style=”width: 156px; height: 55px” | 10:30 a.m. – 6:00 p.m.
| style=”width: 132px; height: 55px” | Austin Convention Center, Room 17AB
| style=”width: 174px; height: 55px” | Organizer: Yervant Zorian, Synopsys
|-
| style=”width: 223px; height: 58px” | Custom Design Luncheon
Addressing Custom Design Challenges with Laker
| style=”width: 156px; height: 58px” | 11:30 a.m. – 1:30 p.m.
| style=”width: 132px; height: 58px” | Hilton Hotel, 6th Floor, Grand Ballroom G
| style=”width: 174px; height: 58px” | RSVP Required
|-
| style=”width: 223px; height: 58px” | Verification Luncheon
SoC Leaders Verify with Synopsys
| style=”width: 156px; height: 58px” | 11:45 a.m. – 1:45 p.m.
| style=”width: 132px; height: 58px” | Hilton Hotel, 6th Floor, Grand Ballroom H
| style=”width: 174px; height: 58px” | RSVP Required
|-
| style=”width: 223px; height: 58px” | Samsung Theater
Accelerating SoC Designs with Synopsys DesignWare® IP for Samsung Processes
| style=”width: 156px; height: 58px” | 1:30 p.m. – 1:45 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 915 Theater
| style=”width: 174px; height: 58px” |
|-
| style=”width: 223px; height: 78px” | Paper Session 11.3
Automatic Design Rule Correction in the Presence of Multiple Grids and Track Patterns
| style=”width: 156px; height: 78px” | 1:30 p.m. – 3:00 p.m.
| style=”width: 132px; height: 78px” | Austin Convention Center, Room 14
| style=”width: 174px; height: 78px” | Speaker: Nitin D. Salodkar, Synopsys
Authors: Subramanian Rajagopalan, Sambuddha Bhattacharya, Shabbir H. Batterywala
|-
| style=”width: 223px; height: 78px” | Paper Session 12.4
An ATE-Assisted DFD Technique for Volume Diagnosis of Scan Chains (Best paper candidate)
| style=”width: 156px; height: 78px” | 1:30 p.m. – 3:00 p.m.
| style=”width: 132px; height: 78px” | Austin Convention Center, Room 15
| style=”width: 174px; height: 78px” | Speaker: Rohit Kapur, Synopsys
|-
| style=”width: 223px; height: 77px” | GlobalFoundries Theater:
Synopsys/GlobalFoundries Collaboration on Interoperable PDK Enablement
| style=”width: 156px; height: 77px” | 4:45 p.m. – 5:00 p.m.
| style=”width: 132px; height: 77px” | Austin Convention Center, Booth 1314 Theater
| style=”width: 174px; height: 77px” |
|-
| style=”width: 223px; height: 58px” | IPL Alliance Dinner
iPDKs: A Thriving PDK Standard
| style=”width: 156px; height: 58px” | 6:00 p.m. – 7:30 p.m.
| style=”width: 132px; height: 58px” | Hilton Hotel, 6[SUP]th[/SUP] Floor, Grand Ballroom G
| style=”width: 174px; height: 58px” | RSVP Required
|-
| style=”width: 223px; height: 65px” | Media/Analyst/Blogger Dinner
| style=”width: 156px; height: 65px” | 6:30 p.m. – 9:30 p.m.
| style=”width: 132px; height: 65px” | Malverde—located above La Condesa, 400 W 2nd Street, Austin, TX
| style=”width: 174px; height: 65px” | NOTE: As space is limited, RSVPs are required by Tuesday, May 28, and are taken on a first-come, first-served basis.
|-
| colspan=”4″ style=”width: 684px; height: 31px” | WEDNESDAY, JUNE 5
|-
| style=”width: 223px; height: 19px” | Event
| style=”width: 156px; height: 19px” | Time
| style=”width: 132px; height: 19px” | Location
| style=”width: 174px; height: 19px” | Additional Information
|-
| style=”width: 223px; height: 58px” | Paper Session 25.1
Machine-Learning-Based Hotspot Detection Using Topological Classification and Critical Feature Extraction
| style=”width: 156px; height: 58px” | 9:00 a.m. – 10:30 a.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Room 14
| style=”width: 174px; height: 58px” | Author: Charles Chiang, Synopsys
|-
| style=”width: 223px; height: 58px” | Samsung Theater
Galaxy Innovations and Collaboration with Samsung for 14-nm FinFET Success
| style=”width: 156px; height: 58px” | 10:30 a.m. – 10:45 a.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 915 Theater
| style=”width: 174px; height: 58px” |
|-
| style=”width: 223px; height: 58px” | Pavilion Panel
IP Pitfalls: Avoid the Wild Ride
| style=”width: 156px; height: 58px” | 10:30 a.m. – 11:15 a.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 509
| style=”width: 174px; height: 58px” | Moderator: Warren Savage, IPextreme
Panelists: John Swanson, Synopsys; Keith Odom, National Instruments; Hans Bouwmeester, Open-Silicon
|-
| style=”width: 223px; height: 58px” | GlobalFoundries Theater
Synopsys/GlobalFoundries Collaboration on Interoperable PDK Enablement
| style=”width: 156px; height: 58px” | 10:45 a.m. – 11:00 a.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Booth 1314 Theater
| style=”width: 174px; height: 58px” |
|-
| style=”width: 223px; height: 58px” | Paper Session 32.4
Spacer-Is-Dielectric-Compliant Detailed Routing for Self-Aligned Double Patterning Lithography (Best paper candidate)
| style=”width: 156px; height: 58px” | 1:30 p.m. – 3:00 p.m.
| style=”width: 132px; height: 58px” | Austin Convention Center, Room 15
| style=”width: 174px; height: 58px” | Moderator: Mehmet Yildiz
Authors: Qiang Ma, Hua Song, James Shiely, Gerard Luk-Pat, Alexander Miloslavsky, Synopsys
|-
| style=”width: 223px; height: 44px” | Technical Panel 34
EDA: Meet Analytics; Analytics: Meet EDA
| style=”width: 156px; height: 44px” | 4:00 p.m. – 5:30 p.m.
| style=”width: 132px; height: 44px” | Austin Convention Center, Room 16AB
| style=”width: 174px; height: 44px” | Moderator: Janick Bergeron, Synopsys
|-
| colspan=”4″ style=”width: 684px; height: 31px” | THURSDAY, JUNE 6
|-
| style=”width: 223px; height: 19px” | Event
| style=”width: 156px; height: 19px” | Time
| style=”width: 132px; height: 19px” | Location
| style=”width: 174px; height: 19px” | Additional Information
|-
| style=”width: 223px; height: 44px” | Technical Panel 47
Analog Design with FinFETs: “The Gods Must be Crazy!”
| style=”width: 156px; height: 44px” | 1:30 p.m. – 2:30 p.m.
| style=”width: 132px; height: 44px” | Austin Convention Center, Room 16AB
| style=”width: 174px; height: 44px” | Panelist: Navraj Nandra, Synopsys
|-
| style=”width: 223px; height: 44px” | Technical Panel 52.1
Routability-Driven Placement for Hierarchical Mixed-Size Circuit Designs
| style=”width: 156px; height: 44px” | 1:30 p.m. – 3:00 p.m.
| style=”width: 132px; height: 44px” | Austin Convention Center, Room 14
| style=”width: 174px; height: 44px” | Author: Tung-Chieh Chen, Synopsys
|-

Additional Information

Synopsys Main Booth #947
Conversation Central, Synopsys’ online radio show, is back again at DAC 2013 with an exciting line up of guests. Synopsys will host two discussions a day from the main booth—come join us! Each show will also be recorded for later viewing and listening on Synopsys’ YouTube channel, iTunes, and the Conversation Central show notes page.
We invite you to sit and listen to a selection of our past shows while visiting the Synopsys booth at DAC. For more information, visit the show notes page at http://blogs.synopsys.com/conversationcentral/
or follow on Twitter: #snps and #50DAC

Other Booths that Include Synopsys

ARM Connected Village Booth #921
Visit Synopsys to see how our collaboration with ARM® helps address leading-edge challenges for system-on-chip design and software development.

GlobalFoundries Booth #1314
Visit Synopsys at the GlobalFoundries booth to find out more about our collaboration and support for advanced process technology. Synopsys will participate in presentations at the GlobalFoundries Theater on Monday, Tuesday and Wednesday.

Samsung Booth #915 Theater
See how Synopsys and Samsung have accelerated SoC designs and collaborated on 14-nm FinFET technology in the Samsung Theater on Monday and Tuesday.

Si2 Booth #1427
As Si2 celebrates its 25[SUP]th[/SUP] anniversary, Synopsys and other members will showcase how they are applying in their products and solutions the spectrum of standards that have been developed at Si2.

TSMC Booth #1746
Synopsys will present on “Enabling Advanced SoC Designs for TSMC Processes with Synopsys DesignWare® IP” in TSMC’s Open Innovation Platform Theater.

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