Webinar – Power is the New Performance: Scaling Power & Performance for Next Generation SoCsWhat if you could reduce power and extend…Read More
Reachability in Analog and AMS. Innovation in VerificationCan a combination of learning-based surrogate models plus…Read More
Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural PivotIn 2003, legendary computer architect Michael J. Flynn…Read More
Enabling RISC-V & AI Innovations with Andes AX45MPV Running Live on S2C Prodigy S8-100 Prototyping SystemQualifying an AI-class RISC-V SoC demands proving that…Read More
Linda Fosler, Tom Daspit and Mitch from Mentor Graphics met with me last Monday at DAC to provide an update on IC layout and circuit simulation tools. My notes follow:
Overview – Pyxis for Schematic and Layout, IC Station is re-branded as Pyxis. (Pyxis schematic is still Falcon, Ample language is still used.)… Read More
Cadence invited Francois Lemery of ST Microelectronics to speak at a luncheon last Monday at DAC about designing for the 20nm node using module generators. Here are my trip report notes:
What a great interview! Xilinx CEO Moshe Gavrielov is right on the money HERE where he credits the high 28nm yields to the “very intimate” linkage in process development with TSMC.… Read More
The speed with which The Mobile Tsunami engulfs the old PC Market is just incredible. 18 months ago the tablet and smartphone markets were considered a Green Field of Opportunity for PC OEMs and chip suppliers to graze in for the next decade. The fences, however, are closing in fast as Apple continues to drive its iOS empire into new… Read More
The way that the press that covers EDA has changed in the last few years is quite dramatic. Semiwiki is, of course, part of that change. The official press is less and less relevant and bloggers and newsletters are more and more important.… Read More
Attendance at DAC is up across the board. Not surprisingly, with San Francisco being so close to silicon valley, the biggest increase was in people coming to see the exhibits.… Read More
Before this DAC I had never even heard of ICScape, so on Monday and Wednesday I visited their booth to find out their story.
Steve Yang, Ph.D. (Co-founder and President), Ravi Ravikumar (Marketing)
ICScape was founded in 2005 in Santa Clara by Steve Yang (Circuit Design engineer for microprocessor, Synopsys) and Jason Xing (Sun… Read More
Britto Vincent of ProPlus Design Solutions met with me at DAC on Monday morning to talk about Design For Yield (DFY) and Analog Fast SPICE.
In 2011 ProPlus announced DFY tools where the technology came from IBM, it provides fast Monte Carlo results up to 3 sigma, then added NanoSpice for faster simulation results. Similar in approach… Read More
I speak VHDL and SystemC, others speak Verilog and SystemVerilog … what do you speak?
Before getting into the core of the topic let me give you some round figures, engineers love numbers. Julian Lonsdale “European Sales Manager at Aldec” informed me at the Xfest Munich last month that Aldec carried out a survey to evaluate the usage… Read More
Okay, President Obama didn’t actually stop at DAC but he did do a drive by. I happened to be stepping out for some much needed fresh air and there goes his speeding motorcade. It was quite a sight actually, with all of the motorcycles, SUVs, a SWAT vehicle and even a paramedic rig (my son the Fireman drives one of those). The president … Read More
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Flynn Was Right: How a 2003 Warning Foretold Today’s Architectural Pivot