One of the barriers to silicon success has always been design costs, especially if you are an emerging company or targeting an emerging market such as IoT. Today design start costs are dominated by IP which is paid at the start of the project and that is after costly IP evaluations and other IP verification and integration challenges. Given that, reducing design costs and enabling design starts has always been a major industry focus starting with the fabless semiconductor transformation that began 30 years ago, which brings us to the DesignShare announcement made by SiFive and Flex Logix last week.
As an emerging IP company one of the greatest challenges is getting customers comfortable with your IP, your support model, and your company in general. Nobody knows this better than Andy Jaros, Vice President of Sales at Flex Logix. Andy started his semiconductor career with Motorola, followed by ARM, then ARC which is where I met him. Virage Logic acquired ARC in 2009 and Andy assumed a leadership role which continued for five years after Synopsys acquired Virage in 2010. Andy has been enabling design starts for most of his career so he knows IP.
I caught up with Andy at ARM TechCon last month and talked about the SiFive DesignShare program. Flex Logix joined DesignShare so customers can get customized chip prototypes with eFPGA cores at a very low cost because Flex Logix and other DesignShare participants defer IP costs until the customer is ready to go into production. Needless to say, Andy is 100% behind this program as it will allow him to work with a much wider range of design starts in a much more efficient manner, for the greater good of the semiconductor industry, absolutely.
By the way, I found the new Flex Logix website to be one of the best IP company websites in regards to content and user friendliness, check it out.
“There is a critical need in the chip industry to provide a faster, cheaper way for innovative companies to rapidly prototype new, advanced chip architectures,” said Geoff Tate, CEO of Flex Logix. “Through DesignShare, SiFive and Flex Logix can give customers a highly programmable, flexible chip design for both microcontroller SoCs and multicore process SoCs. The RISC-V architecture provides excellent performance, and – when combined with embedded FPGA functionality, can provide higher performance in a reconfigurable way.”
Geoff Tate (founding CEO of Rambus) is one of the more interesting and more available IP CEO’s you can meet. He attends as many conferences as I do and is eager to interact with customers and partners. You can meet Geoff and the Flex Logix team next at the REUSE 2017 Conference on December 14[SUP]th[/SUP].
“The addition of Flex Logix’s best-in-class embedded FPGA platform to the DesignShare ecosystem provides engineers with a new and better way to bring SoCs to market,” said Naveed Sherwani, CEO of SiFive. “The adoption of the RISC-V architecture continues to experience significant growth, and the addition of embedded FPGA technologies through DesignShare will make it easier and more flexible for designers to employ RISC-V in their future designs across a wide range of implementations, from embedded devices to the data center.”
Naveed Sherwani is another friendly semiconductor CEO that attends many of same events I do. He has founded or cofounded 9 different companies including Open-Silicon and is quite the semiconductor historian.
Bottom line: Design starts are the lifeblood of the semiconductor industry and we should all do whatever is possible to enable them and DesignShare does just that.