WEBINAR: Design Adaptive eFPGA IP

WEBINAR: Design Adaptive eFPGA IP
by Daniel Nenni on 09-18-2020 at 10:00 am

Menta Adaptive Design eFPGA Webinar 1

Since the start of PROMS, PLDs and FPGAs we have learned the importance of programmability in modern semiconductor design. Today we have eFPGAs for “design adaptive” embedded programmability and that is what this webinar is all about.

Several key points are discussed starting with the Law of Accelerating Returns as it applies… Read More


Reverse-engineering the First FPGA Chip Xilinx XC2064

Reverse-engineering the First FPGA Chip Xilinx XC2064
by Ken Shirriff on 09-16-2020 at 6:00 am

Xilinx XC2064

A Field-Programmable Gate Array (FPGA) can implement arbitrary digital logic, anything from a microprocessor to a video generator or crypto miner. An FPGA consists of many logic blocks, each typically consisting of a flip flop and a logic function, along with a routing network that connects the logic blocks. What makes an FPGA… Read More


How FPGAs Enable Industrial Automation and Transformation to Industry 4.0

How FPGAs Enable Industrial Automation and Transformation to Industry 4.0
by Daniel Nenni on 09-08-2020 at 9:00 am

diwark

As Industry 4.0 becomes more pervasive, and factories transform to become Smart and Connected, new architectures emerge, paving the way for new industrial applications. Field devices are embedding intelligence and in many cases, cloud connectivity is being integrated.

This webinar will present an overview of current trends

Read More

Moving to Deeply Scaled Nodes for Power? There is a Better Way

Moving to Deeply Scaled Nodes for Power? There is a Better Way
by Mike Gianfagna on 08-24-2020 at 10:00 am

AGGIOS Definition

Did you know you can save 30% to 60% power without spending a fortune on a process migration? There is a better way than moving to deeply scaled nodes for power. Read on…

Have you heard of AGGIOS? You will. The name stands for AGGregated IO Systems, and a team of ex ARM and Qualcomm engineers are re-inventing power management. I’ll explain… Read More


CORE-V HW and SW in the FPGA environment

CORE-V HW and SW in the FPGA environment
by Daniel Nenni on 08-20-2020 at 11:00 am

Episode 3 of OpenHW TV will air live on 20th August at 11am EST / 4pm BST / 8am PST and will give a detailed update of work in our HW and SW Task Groups, as well as featuring guest member Ashling.

You will hear from the Chairs of the groups about the work of the SW and HW Task Groups to date, including an outlook to future roadmaps. We look

Read More

Powering the Next-Generation Machine Learning Solution with Graph Analytics on Connected Data with Xilinx and TigerGraph

Powering the Next-Generation Machine Learning Solution with Graph Analytics on Connected Data with Xilinx and TigerGraph
by Daniel Nenni on 08-11-2020 at 10:00 am

Please join Xilinx and TigerGraph to learn about the next-generation machine learning solution combining cutting edge hardware with graph analytics on connected data to answer these key questions:

  • How do I understand the wellness journey of a patient and find patients like them in real-time to figure out the recommended next
Read More

Achronix Blog Roundup!

Achronix Blog Roundup!
by Daniel Nenni on 07-09-2020 at 10:00 am

Achronix Speedcore

Blogging is not an easy thing to do. It takes time, patience, commitment, and creativity. SemiWiki brought blogging to the semiconductor industry and many companies have followed. Very few have been successful with personal or corporate blogs but as a premier semiconductor blogger I have developed a proven recipe over the last… Read More


WEBINAR: Validate hyperscale SoC design using cloud-based hardware simulation framework

WEBINAR: Validate hyperscale SoC design using cloud-based hardware simulation framework
by Daniel Nenni on 06-17-2020 at 9:00 am

To run the real-world workloads on cycle-accurate hardware simulation framework is one of the essential tasks in the system-level validation before silicon tape-out. S2C introduced Prodigy Cloud System recently in the response to meet challenging targets.

It is equipped with scalable FPGA capacity using the largest FPGA … Read More


Webinar: Hyperscale SoC Validation with Cloud-based Hardware Simulation Framework

Webinar: Hyperscale SoC Validation with Cloud-based Hardware Simulation Framework
by Daniel Nenni on 06-05-2020 at 6:00 am

Slide1

S2C has been developing FPGA prototyping platforms since 2003, and, over time, their FPGA prototyping platforms have supported increasingly larger more sophisticated FPGA prototyping projects with three key attributes; 1) scalable prototyping gate capacities, 2) a high-speed interface between the FPGA prototype and software… Read More


CEO Interview: Robert Blake of Achronix

CEO Interview: Robert Blake of Achronix
by Daniel Nenni on 05-25-2020 at 10:00 am

Robert Blake Achronix CEO SemiWiki

Achronix came to SemiWiki in 2017 and we added a chapter on the history of Achronix in our update version of “Fabless: The Transformation of the Semiconductor Industry”. So yes we know quite a bit about Achronix and the FPGA business so it was a pleasure to do a CEO Q&A with Robert Blake. First lets take a look at his … Read More