FPGA Front Runner – Using AI in development and product for FPGA
How are they used? What input language is used and how does it find it’s way into the FPGA?
How is the AI trained?
Any use case example
Partner
FPGA Front Runner event Partner: TechWorks & Tessolve
NOTE
Please be aware that if you register for both the in-person… Read More
Twenty years ago, Blue Pearl showcased its first-generation ASIC and FPGA static verification solution at the 2004 Design Automation Conference. If you are attending DAC 2024, stop by booth 1439 and see how 20 years of product development on the Visual Verification Suite has made chip design much more efficient.
The Visual Verification… Read More
Dieter Therssen obtained his master’s degree in Electronics Engineering from KU Leuven in 1987. He started his career as a hardware design engineer, using IMEC’s visionary tools and design methodologies in the early days of silicon integration.
Since then, Dieter developed his career across many digital technologies,… Read More
Field-Programmable Gate Arrays (FPGAs) have long been celebrated for their unmatched flexibility and programmability compared to Application-Specific Integrated Circuits (ASICs). And the introduction of Embedded FPGAs (eFPGAs) took these advantages to new heights. eFPGAs offer on-the-fly reconfiguration capabilities,… Read More
AI and ML techniques are popular topics, yet there are considerable challenges to those that want to design and build an AI accelerator for inferencing, as you need a team that understands how to model a neural network in a language like Python, turn that model into RTL, then verify that your RTL matches Python. Researchers from CERN,… Read More
In the ever-evolving world of Conversational AI and Automatic Speech Recognition (ASR), an upcoming LinkedIn Live webinar is set to redefine the speech-to-text industry. Achronix Semiconductor Corporation is teaming up with Myrtle.ai to bring you a webinar on October 24, 2023, at 8:30am PST.
Moderated by EE Times’ Sr. Reporter,… Read More
S2C, a leading provider of FPGA-based prototyping solutions, has helped a client achieve high-performance secure GPU chip verification. With the help of S2C’s Prodigy prototyping solution, the client was able to start software development and hardware-software co-design early, leading to accelerated time-to-market… Read More
Harry Foster is Chief Scientist in Verification at Siemens EDA and has held roles in the DAC Executive Committee over multiple years. He gave a lunchtime talk at DVCon on the verification complexity topic. He is an accomplished speaker and always has a lot of interesting data to share, especially his takeaways from the Wilson Research… Read More
When you think “FPGA,” what comes to mind? Massive, expensive parts capable of holding a lot of logic but also consuming a lot of power. Reconfigurable platforms that can swallow RTL for an SoC design in pre-silicon testing. Big splashy corporate acquisitions where investors made tons of money. Exotic 3D packaging and advanced… Read More
Join our upcoming webinar on JESD204 and get insights into what we predict the upcoming JESD204D standard will contain, based on many years of experience working with JESD204.
Our expert speaker, Piotr Koziuk, has over a decade of experience with JESD204 standards and is a member of the JEDEC Standardization Committee. He will… Read More
