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EUV is NOT Ready for 7nm!

EUV is NOT Ready for 7nm!
by Daniel Nenni on 02-27-2017 at 8:00 am

The annual SPIE Advanced Lithography Conference kicked off last night with vendor sponsored networking events and such. SPIE is the international society for optics and photonics but this year SPIE Advanced Lithography is all about the highly anticipated EUV technology. Scotten Jones and I are at SPIE so expect more detailedRead More


The 2017 Leading Edge Semiconductor Landscape

The 2017 Leading Edge Semiconductor Landscape
by Scotten Jones on 12-27-2016 at 6:00 pm

In early September of 2016 I published an article “The 2016 Leading Edge Semiconductor Landscape” that proved to be very popular with many views, comments and reposting’s. Since I wrote that article a lot of new data has become available enabling some projections to be replaced by actual values and new analysis… Read More


The Status and Future of FDSOI

The Status and Future of FDSOI
by Scotten Jones on 09-26-2016 at 12:00 pm

I recently took a look at the current status and future direction of FinFET based logic processes in my Leading Edge Logic Landscape blog. I thought it would be interesting to take a similar look at FDSOI and to compare and contrast the two processes. My Leading Edge Logic Landscape blog is available here.… Read More


TSMC 16nm, 10nm, 7nm, and 5nm Update!

TSMC 16nm, 10nm, 7nm, and 5nm Update!
by Daniel Nenni on 09-13-2016 at 4:00 pm

Word on the street is that TSMC is on schedule with 16FFC, 10nm and 7nm, which is a very big deal for the fabless semiconductor ecosystem. As Scotten Jones has illustrated in the graphic below, for the first time in the history of the semiconductor industry a pure-play foundry (TSMC) will have the process lead over Intel. And this is… Read More


The 2016 Leading Edge Semiconductor Landscape

The 2016 Leading Edge Semiconductor Landscape
by Scotten Jones on 09-03-2016 at 7:00 am

The leading edge semiconductor logic landscape has in recent years collapsed to just four companies. The following is a summary of what is currently known about each company’s plans and how they compare. ASML has analyzed many logic nodes and developed a formula that normalizes processes to a “standard node”.… Read More


Qualcomm is Back on Top of the SoC World!

Qualcomm is Back on Top of the SoC World!
by Daniel Nenni on 08-13-2016 at 7:00 am

In 2015 Qualcomm stunned the fabless semiconductor world with an unprecedented layoff. When I first heard about it the number was 5% but it kept growing and finally hit 15%. The big misstep here was, that after being the SoC leader starting in 2007 with the Snapdragon series of chips that powered the Smartphone revolution, QCOM did… Read More


STT-MRAM – Coming soon to an SoC near you

STT-MRAM – Coming soon to an SoC near you
by Tom Dillinger on 07-05-2016 at 4:00 pm

An increasing percentage of SoC die area is being allocated to memory arrays, as applications require more data/instruction storage and boot firmware. Indeed, foundries invest considerable R&D resources into optimizing their array technology IP offerings, often with more aggressive device features than used for other… Read More


Highlights of the 28nm FD-SOI San Jose Presentations

Highlights of the 28nm FD-SOI San Jose Presentations
by Adele Hars on 06-05-2016 at 8:00 pm

Samsung FDSOI productionstatus SanJose16c

Most of the presentations from the FD-SOI Symposium in San Jose last month (April 2016) are now available on the SOI Consortium website (click here to see the full list — if they’re posted, you can download them freely from there). If you don’t have time to wade through them all, here are some of the highlights. … Read More