WP_Term Object
(
    [term_id] => 13
    [name] => Arm
    [slug] => arm
    [term_group] => 0
    [term_taxonomy_id] => 13
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 386
    [filter] => raw
    [cat_ID] => 13
    [category_count] => 386
    [category_description] => 
    [cat_name] => Arm
    [category_nicename] => arm
    [category_parent] => 178
    [is_post] => 
)
            
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WP_Term Object
(
    [term_id] => 13
    [name] => Arm
    [slug] => arm
    [term_group] => 0
    [term_taxonomy_id] => 13
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 386
    [filter] => raw
    [cat_ID] => 13
    [category_count] => 386
    [category_description] => 
    [cat_name] => Arm
    [category_nicename] => arm
    [category_parent] => 178
    [is_post] => 
)

MCU Performance Customers: The Cavalry is Coming Over The Hill

MCU Performance Customers: The Cavalry is Coming Over The Hill
by Ed McKernan on 07-31-2011 at 7:30 pm

cavalry lg

The under the radar, sleepy microcontroller market is about to undergo a rapid transformation the next several years with new entrants and the rise of 32 bit cores that will redefine the parameters for success. This will revive growth and result in new winners and losers. But lots of questions remain.

My first job out of college in… Read More


Cache Coherency and Verification Seminar

Cache Coherency and Verification Seminar
by Paul McLellan on 07-27-2011 at 5:45 pm

At DAC Jasper presented a seminar with ARM on cache coherency and verification of cache coherency. The seminar is now available online for those of you that missed DAC or missed the seminar itself.

Cache architectures, especially for multi-core architectures, are getting more and more complex. Techniques originally pioneered… Read More


Intel’s Mobile Deja Vu All Over Again Moment

Intel’s Mobile Deja Vu All Over Again Moment
by Ed McKernan on 07-26-2011 at 12:49 pm

We have been here before… and when I say “we” I do include myself. Back in 1997, I joined a secretive company called Transmeta. The company was two years old and working on a new x86 microprocessor to challenge Intel. The original focus of the company was not to build a lower power processor, but one that was faster. As with… Read More


Intel’s Barbed Wire Fence Strategy

Intel’s Barbed Wire Fence Strategy
by Ed McKernan on 07-21-2011 at 11:38 am

Analysts tend to make judgments regarding Intel based on an existing conventional wisdom (CW) and projecting straight line into the future. As a former Intel, Cyrix, and Transmeta processor marketing guy I would like to offer a different perspective as I have been both inside the tent looking out and outside looking in.

The current… Read More


And it’s Intel at 22nm but wait, Samsung slips ahead by 2nm…

And it’s Intel at 22nm but wait, Samsung slips ahead by 2nm…
by Paul McLellan on 07-12-2011 at 12:46 pm

Another announcement of interest, given all the discussion of Intel’s 22nm process around here, is that Samsung (along with ARM, Cadence and Synopsys) announced that they have taped out a 20nm ARM test-chip (using a Synopsys/Cadence flow).

An interesting wrinkle is that at 32nm and 28nm they used a gate-first process but… Read More


On-chip supercomputers, AMBA 4, Coore’s law

On-chip supercomputers, AMBA 4, Coore’s law
by Paul McLellan on 07-11-2011 at 12:45 pm

At DAC I talked with Mike Dimelow of ARM about the latest upcoming revision to the AMBA bus standards, AMBA 4. The standard gets an upgrade about every 5 years. The original ARM in 1992 ran at 10MIPS with a 20MHz clock. The first AMBA bus was a standard way to link the processor to memories (through the ARM system bus ASB) and to peripherals… Read More


Intel Twisting ARM?

Intel Twisting ARM?
by Daniel Nenni on 07-10-2011 at 11:00 am

Intel’s new Tri-Gate technology is causing quite a stir on the stock chat groups. Some have even said if Intel uses its Tri-Gate technology on only Intel processors ARM will be in deep deep trouble. These guys are “Intel Longs” of course and they are battling “Intel Shorts” with cut and paste news clips.

“ARM is in trouble & this
Read More


ARM and Mentor Team Up on Test

ARM and Mentor Team Up on Test
by Daniel Payne on 06-27-2011 at 2:31 pm

Introduction
Before DAC I met with Stephen Pateras, Ph.D. at Mentor Graphics, he is the Product Marketing Director in the Silicon Test Solutions group. Stephen has been at Mentor for two years and was part of the LogicVision acquisition. He was in early at LogicVision and went through their IPO, before that he was at IBM in the mainframe… Read More


Physical IP Group at ARM

Physical IP Group at ARM
by Daniel Payne on 06-13-2011 at 5:45 pm

After lunch on Monday I met with John Heinlin, Ph.D. – VP Marketing of Physical IP Division

Back in the day I knew the founders of Artisan (VLSI Libraries) when we worked together at Silicon Compilers (Mark Templeton, John Malecki, Scott Becker).

Q: Do you favor any EDA tools for creating your IP?
A: No, we don’t really endorse a specific… Read More


GLOBALFOUNDRIES 28nm Design Ecosystem!

GLOBALFOUNDRIES 28nm Design Ecosystem!
by Daniel Nenni on 06-01-2011 at 11:00 am

GLOBALFOUNDRIES will show off its 28nm design ecosystem at #48DAC next week in San Diego. The company will feature a full design ecosystem for its 28nm High-k Metal Gate (HKMG) technology, including silicon-validated flows, process design kits (PDKs), design-for-manufacturing (DFM), and intellectual property (IP) in partnership… Read More