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One of the more entertaining things I get to observe in the semiconductor ecosystem is competitive customer evaluations of tools and IP. Seriously, this is where the rubber meets the road no matter what the press releases say.
This time it was emulators which is one of the most interesting EDA market segments since there is no dominant… Read More
As I mentioned in a previous post, the big drama at last year’s Design Automation Conference was the acquisition of the Electronic Systems Design Alliance (formerly EDAC) by SEMI, the owner of the SEMICON West Conference franchise. The plan is to add an ES Design West wing to the SEMICON West conference in San Francisco next year.… Read More
After mentioning what I heard at IEDM 2018, that Intel was officially closing the merchant foundry business as an aside in a SemiWiki forum discussion, I got a lot of email responses so let me clarify. Honestly I did not think it was a big surprise. Intel Custom Foundry was an ill conceived idea (my opinion) from the very start and was… Read More
As SoC and IP designs continue to increase in complexity while schedules accelerate, verification teams are looking for methodologies to improve design confidence more quickly. Formal verification techniques provide one route to improved design confidence, and the increase in papers and interest at industry conferences… Read More
Hello, my name is Daniel Nenni and I am a semiconductor conference addict. I just can’t seem to get enough. The semiconductor ecosystem is very wide now and moves so quickly it is nearly impossible to keep up without constant conference attendance. As a SemiWiki contributor not only do I get free conference passes, I get access to … Read More
IEDM is a premier semiconductor conference so it was certainly appropriate for Samsung to do the keynote since they are the largest and one of the most innovative semiconductor companies in the world, absolutely.
Samsung is also one of the more interesting semiconductor companies since they do it all: chip design, semiconductor… Read More
For SOC designers that are waiting for library models the saying “give me liberty or give me death” is especially apropos. Without libraries to support the timing flow, SOC design progress can grind to a halt. As is often the case, more than just a few PVT corners are needed. Years ago, corners were what the term sounded like – the 4 corners… Read More
Semiconductor IP is one of the more exciting and most viewed topics we cover on SemiWiki, it has been that way since we began in 2011 and that trend will continue indefinitely, my opinion.
Semiconductor IP: Total Blogs: 640: Total Views: 3253751: Average: 5084
Based on the design starts we track, Cloud Computing is a leading semiconductor… Read More
A few months back, we interviewed Cristian Amitroaie, the CEO of AMIQ EDA. We talked mostly about their Design and Verification Tools (DVT) Eclipse Integrated Development Environment (IDE) and how it helps design and verification engineers develop code in SystemVerilog and several other languages. Cristian also mentioned… Read More
The rapidly increasing complexity of today’s designs, combined with schedule pressure to deliver innovative products to market as quickly as possible, strains engineering resources to the limit, often to the point of breaking. As a result, 17% of all projects get canceled, and another 28% miss their target release date (Source:… Read More
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