Certification for Post-Quantum Cryptography gaining momentumA crucial step in helping any new technology…Read More
IEDM Opens with a Big Picture Keynote from TSMC’s Yuh-Jier MiiThe main program for the 70th IEDM opened…Read More
How I learned Formal VerificationBing Xue is a dedicated Formal Verification Engineer at Axiomise,…Read More
Accellera 2024 End of Year UpdateFrom my viewpoint, standards organizations in semiconductor design…Read More
The next Apache webinar is on PowerArtist, RTL Power Analysis on July 26th at 11am Pacific time. The webinar will be conducted by David “Woody” Norwood, Principal Applications Engineer at Apache Design Solutions. David has been supporting RTL Power products for the past 8 years. He has broad EDA industry experience… Read More
Analysts tend to make judgments regarding Intel based on an existing conventional wisdom (CW) and projecting straight line into the future. As a former Intel, Cyrix, and Transmeta processor marketing guy I would like to offer a different perspective as I have been both inside the tent looking out and outside looking in.
The current… Read More
Workshops are a great where to learn hands-on about IC design technology. Mentor has a free workshop to introduce you to creating, simulating and verifying mixed-signal (Analog and Digital) designs.
PLL waveforms showing both digital and analog signals.
Dates in Fremont, California
July 26, 2011
September 15, 2011
November… Read More
Gary Smith has a note out about the Apache acquisition by Ansoft (unfortunately if you get his email newsletter the link there takes you to the wrong article but it really is here or here as pdf). Most of the note actually describes the acquisition and the Apache product line which won’t reveal much new to anyone here.
He regards… Read More
I haven’t made a secret of the fact that I maintain Oasys Design System’s website. So I had a small task yesterday of adding Qualcomm to the list of customer logos that cycle through on the home page. It is a pretty impressive list including Juniper Networks, Netlogic Microsystems, Texas Instruments and ST Microelectronics.… Read More
Very interesting results launched by EDAC for Q1 2011, if Computer Aided Engineering (CAE) is still the largest category with $530.6M, the second category is Silicon IP (SIP) with $371.4M, followed by IC Physical Design & Verification at $318.5M. Even more significant is the four quarter moving average results, showing … Read More
Each quarter, the EDA Consortium publishes the Market Statistics Service (MSS) report containing detailed revenue data for the EDA industry. The report compiles data submitted confidentially by both public and private EDA companies into tables and charts listing the data by both EDA category and geographic region. This newsletter… Read More
As you probably know, Synopsys last year acquired VaST and CoWare and a couple of years early had acquired Virtio. All three companies primarily competed in the virtual platform market. In addition, Synopsys is the #2 IP company (behind ARM) and has a wide range of tools for SoC design. So the interesting question is how would they… Read More
During the next 6 months or so, SpringSoft will be running a dozen community conferences. These are open not just to users but to anyone interested in SpringSoft’s technology.
There will be 3 conferences in US in October in Irvine, Austin and San Jose. For more details as they become available check here. There will be three… Read More
I like to say that “you can’t ignore the physics any more” to point out that we have to worry about lots of physical effects that we never needed to consider. But “you can’t ignore the statistics any more” would be another good slogan. In the design world we like to pretend that the world is pass/fail. But manufacturing is actually a statistical… Read More
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