CEO Interview with Jun Yuan of Arcas-TechJUN YUAN BIO ◆Engineer for chip design, simulation,…Read More
ChipNexus Brings Agentic AI into Established Analog Design FlowsChipNexus has introduced its NEX Analog Agent, bringing…Read More
Delivering Silicon Systems Through AI Disruption, Part 2: The ConductorConductor: the person who keeps every section of…Read More
WEBINAR: Porting, Analysing & Optimising AI Models onto Edge GPUsModern AI models are opening up new possibilities…Read More
Interview with David Tester VP of Engineering Mach42David Tester is the VP of Engineering at…Read More
There were two big announcements last week right in my backyard and I missed them both! Instead, I was in Taiwan investigating yet another big development and all three of these events will intersect next year, absolutely.
At IDF in San Francisco Intel outlined the new 14nm Core M. This is an impressive CPU, one that will fill the now… Read More
We made it! I have stood on the highest point in Africa, Uhuru Peak of Kilimanjaro.
Obviously this blog entry is totally off-topic. If you want to read about semiconductors and stuff, you can skip it.
So how do you get to the top of a nearly 20,000’ mountain? Slowly.
Slowly on two different levels. The first level is giving your body time… Read More
Process shrinks, which have served us well for most of the Moore’s Law journey, are reaching their limits. For switching transistors, the biggest problems of leakage current and gate oxide vulnerability in planar MOSFETs have led the industry to new 3D microstructures such as FinFET. For non-volatile memory, the problem is generally… Read More
Spice view of a design, block or fragment of the design is probably the lowest level of functional description of a circuit in terms of transistors, resistors, capacitors, interconnect and so on, which in several ways acts as an ultimate proof of pudding for any semiconductor design before manufacturing. However, it’s generally… Read More
FPGA devices are a great way to drive silicon technology development because they contain both digital and analog IP, along with sophisticated IO cells. The highest performance IOs are transceivers, and Altera has recently designed the Arria 10 device family to include up to 96 transceivers, using a 20nm technology that can achieve… Read More
With four children entering the job market I have a very simple piece of advice: DO NOT RUN FROM TECHNOLOGY, EMBRACE IT! Smartphones are now a “natural” part of modern life. We work on them, we play on them, we shop with them, we socialize with them, even risk our lives using them. Come on, every single person with a smartphone has used… Read More
The semiconductor design industry is ever challenged with increasing chip density, manufacturing complexity with cutting-edge technologies, accommodating multiple IPs with different functionalities from various sources, optimizing power, performance and cost, maximizing manufacturability and reliability and still… Read More
eSilicon, in conjunction with King Research, is conducting an unusual survey. A lot of vendor-driven surveys focus on specific pain points that are addressed by that particular vendor’s product/service. The idea is typically to either promote visibility for the product/service or establish its undeniable need in the market.… Read More
In America the popular press talks almost non-stop about: Disasters, politicians, celebrities and Apple. Yes, Apple. Today I watched the live cast of the new Apple product announcements.
iPhone 6
First, the see things differently video started playing, then the live stream died so I had to turn over to CNET where they were live … Read More
At the Citi Global Technology Conference last week Intel (INTC) CEO Brian Krzanich made some comments about the foundry business that I found quite misinformed. It will be interesting to see if this theme is repeated during the foundry presentations at the Intel Developer Forum in San Francisco this week:
Intel is presenting two… Read More
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The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival