WEBINAR: Why Network-on-Chip (NoC) Has Become the Cornerstone of AI-Optimized SoCsBy Andy Nightingale, VP of Product Management and…Read More
imec on the Benefits of ASICs and How to Seize ThemIn an era where product differentiation increasingly depends…Read More
MZ Technologies Launches Advanced Packaging Design Video SeriesIn a significant move aimed at empowering semiconductor…Read More
Superhuman AI for Design Verification, Delivered at ScaleThere is a new breed of EDA emerging.…Read More
The Quantum Threat: Why Industrial Control Systems Must Be Ready and How PQShield Is Leading the DefenseIndustrial control systems (ICS) underpin the world’s most…Read More
In a engaging presentation at a recent RISC-V summit, Martin Dixon, Google’s Director of Data Center Performance Engineering, took the audience on a metaphorical “road trip” to explore the company’s vision for integrating RISC-V into its massive warehouse-scale computing infrastructure. Drawing… Read More
Dr. Masha Petrova is CEO and co-founder of Nullspace Inc., a venture-backed company developing next-generation electromagnetic simulation software for RF and quantum computing applications. She brings 25 years of engineering software experience from executive roles at MSC Software, Altium, and Ansys, and several computational… Read More
In a compelling keynote at the RISC-V Summit North America 2025, Jeremy Dahan from AWS explored the challenges of embedded systems development and how cloud technologies can bridge the gap between local hardware tinkering and scalable, shareable environments. Drawing from his experience as an engineer, Dahan highlighted … Read More
Daniel is joined by John Ferguson, senior director of product management for the Calibre products in the 3DIC space at Siemens EDA. He manages the vision and product offerings in the Calibre domain for 3DIC design solutions.
Dan explores the challenges of 3DIC and chiplet-based design with John, who describes the broad range of… Read More
In a prior post, I discussed how the clock is no longer just another signal at advanced nodes. Indeed, it is the most critical network on the chip. An optimized clock network can be the margin of victory for your next design. But extracting these benefits is challenging. The clock network is quite sensitive, and optimization can come… Read More
Our good friend Scotten Jones wrote a paper on a product that has been in joint development with Synopsys and is now available. Scott is currently President Semiconductor Manufacturing Economics and Senior Fellow at TechInsights. Scott and I have discussed this product many times and I feel it is ground breaking technology for… Read More
There’s more than one way to build a quantum computer (QC) though it took me a while to find a good reference. I finally settled on Building Quantum Computers: A Practical Introduction. Excellent book but designed only for those who will enjoy lots of quantum math. I’m going to spare you that and instead describe a couple of the more… Read More
By Dina Medhat
Three key takeaways
Building a complex SoC is a risky endeavor that demands careful planning, strategic decisions, and collaboration across hardware and software domains. As highlighted in Darren Jones’ RISC-V Summit presentation from Andes Technology, titled “From Blueprint to Reality: Navigating SoC Tradeoffs, IP, and Ecosystem,”… Read More
This is not about architecting a full SoC from scratch. You already have a competitive platform, now you want to add some kind of accelerator, maybe video, audio, ML, and need to explore architectural options for how accelerator and software should be partitioned, and to optimize PPA. Now we have AI to help us optimize you’d like … Read More
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Quantum Computing Technologies and Challenges