PDF Solutions Adds Security and Scalability to Manufacturing and TestEveryone knows design complexity is exploding. What used…Read More
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TSMC's 2024 Sustainability Report: Pioneering a Greener Semiconductor FutureTSMC, the world's most trusted semiconductor foundry, released…Read More
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MediaTek’s first chipset using 2nm technology expected in late 2026
MediaTek, a global leader in fabless semiconductor design, has announced a groundbreaking achievement in its partnership with TSMC. The company has successfully developed a flagship system-on-chip (SoC) utilizing TSMC’s cutting-edge 2nm process technology,… Read More
In the rapidly evolving landscape of semiconductor manufacturing, the demand for processors that handle increasing workloads while maintaining power efficiency and compact form factors has never been higher. Intel’s Foveros 2.5D packaging technology emerges as a pivotal innovation, enabling denser die integration… Read More
While stochastic defects link yield with the practical resolution of EUV lithography resulting from its quantum nature [1], very low yields of EUV processes are more readily linked to the use of EUV masks without pellicles. Pellicles are thin film membrane covers on masks (regardless of wavelength: EUV and DUV and i-line) used… Read More
Dan is joined by Ross Miller, senior vice president at SkyWater Technology. Ross leads the industrial and aerospace businesses while steering the company’s branding, and corporate communications efforts. He is a seasoned semiconductor and technology executive with over 20 years of experience across startup, enterprise,… Read More
In the fast-paced semiconductor industry Synopsys has redefined EDA with its Synopsys.ai Copilot, a generative AI tool. Since its launch in November 2023, and yes I was at the launch and very skeptical, Copilot has evolved to address the industry’s growing design complexity and projected 15-30% workforce gap by 2030. Let’s… Read More
An engineering change order, or ECO in the context of ASIC design is a way to modify or patch a design after layout without needing to re-implement the design from its starting point. There are many reasons to use an ECO strategy. Some examples include correcting errors that are found in post-synthesis verification, optimizing … Read More
Introduction: The Historical Roots of Hardware-Assisted Verification
The relentless pace of semiconductor innovation continues to follow an unstoppable trend: the exponential growth of transistor density within a given silicon area. This abundance of available semiconductor fabric has fueled the creativity of design… Read More
The concept of built-in self-test for electronics has been around for a while. An article in Electronic Design from 1996 declared that, “built-in self-test (BIST) is nothing new.” The memory subsystem is a particularly large and complex part of any semiconductor design, and it’s one that can be particularly vexing to test. Design… Read More
Keeping up with the furious pace of AI innovation probably doesn’t allow a lot of time for deep analysis across many use cases. However I can’t help feeling we’re sacrificing quality and ultimately end user acceptance of AI by prioritizing new capabilities over rigorous productization. I am certain that product companies do rigorous… Read More
Can cash and IBM collaboration put Japan into premier-league chipmaking? Rapidus is betting billions it can.
When Japan announced the creation of Rapidus in 2022, the news was met with a mix of enthusiasm and skepticism. The company would enter the market at a time of escalating demand for semiconductor fabrication capacity to… Read More
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MediaTek Develops Chip Utilizing TSMC’s 2nm Process, Achieving Milestones in Performance and Power Efficiency