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Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too Late

Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too Late
by Mike Gianfagna on 06-18-2026 at 8:00 am

Webinar Caspia Shows You How to Fix Security Flaws Before It’s Too Late

I recently posted an overview of an upcoming webinar from Caspia Technologies. That post provides background on the excellent speakers who will present and an overview of the topics they will cover.  I recently had the opportunity to attend a dry run of the entire event. The details presented are quite impactful, so I thought I’d… Read More


Feed Forward Intelligence: Enabling Testability in the Chiplets Era

Feed Forward Intelligence: Enabling Testability in the Chiplets Era
by Kalar Rajendiran on 06-18-2026 at 6:00 am

Data Feed Forward Architecture

The semiconductor industry is entering a new era in which advanced packaging and chiplets-based architectures are becoming the primary drivers of system-level innovation. As traditional process-node scaling becomes increasingly complex and expensive, manufacturers are turning to heterogeneous integration, combining… Read More


Synopsys Unifies Electrical, Thermal, Mechanical, and Optical Analysis with Multiphysics Fusion Solutions

Synopsys Unifies Electrical, Thermal, Mechanical, and Optical Analysis with Multiphysics Fusion Solutions
by Daniel Nenni on 06-17-2026 at 2:00 pm

Synopsys Announces Availability of the First Wave of Multiphysics Fusion Solutions

Synopsys has announced the availability of the first wave of its Multiphysics Fusion Solutions, extending its vision of a unified engineering environment that connects EDA, semiconductor physics, system simulation, and artificial intelligence-driven optimization. The announcement addresses one of the most significant… Read More


RISC-V and AI: The Architecture Shift Is Now

RISC-V and AI: The Architecture Shift Is Now
by Daniel Nenni on 06-17-2026 at 10:00 am

RISC V and AI The Architecture Shift Is Now

The semiconductor industry has experienced several defining transitions over the last three decades. We moved from single-core to multicore processors, from ASIC-centric designs to IP-based SoCs, and from monolithic integration to heterogeneous architectures. Today, another transition is underway, one that may ultimately… Read More


MIPI Alliance Accelerates Automotive AI Connectivity with A-PHY Compliance Program

MIPI Alliance Accelerates Automotive AI Connectivity with A-PHY Compliance Program
by Daniel Nenni on 06-17-2026 at 8:00 am

MIPI Alliance Accelerates Automotive AI Connectivity with A PHY Compliance Program

The automotive semiconductor industry is undergoing a major architectural transition as vehicles evolve into centralized, software-defined computing platforms capable of supporting advanced driver assistance systems (ADAS), autonomous driving, and AI-enabled cockpit applications. This shift is driving demand for… Read More


PowerArtist RTL Power Estimation Folds into Keysight

PowerArtist RTL Power Estimation Folds into Keysight
by Bernard Murphy on 06-17-2026 at 6:00 am

PowerArtist exploring and fixing hotspots in a GPU

Back in the late 1990s, Sente launched a product called WattWatcher to estimate power from design RTL and simulation activity. This was revolutionary for its time since alternatives, while very accurate, only offered power analysis at the gate level. Gate-level analysis is great for fine-tuning power but is unhelpful for achieving… Read More


Intel Foundry Expands the 18A Platform with 18A-P and Demonstrates Long-Term Technology Leadership at VLSI 2026

Intel Foundry Expands the 18A Platform with 18A-P and Demonstrates Long-Term Technology Leadership at VLSI 2026
by Daniel Nenni on 06-16-2026 at 2:00 pm

Intel Foundry Trust 2026

At the 2026 VLSI Symposium, Intel Foundry provided a detailed update on its process technology roadmap, highlighting the continued maturation of Intel 18A, the introduction of Intel 18A-P, and several advanced research initiatives that extend beyond current gate-all-around (GAA) transistor architectures. The presentation… Read More


GPU-native mask rule checking eliminates the curvilinear mask rule check bottleneck

GPU-native mask rule checking eliminates the curvilinear mask rule check bottleneck
by Admin on 06-16-2026 at 10:00 am

fig1 gpu opc challenge

As semiconductor manufacturing pushes toward advanced nodes with tighter feature sizes, the optical proximity correction (OPC) workflow is adopting curvilinear masks to achieve the larger process windows that traditional Manhattan geometries cannot deliver.

Traditional Manhattan masks constrain shapes to vertical … Read More


A tower-like heterogeneous packaging architecture for the AI era

A tower-like heterogeneous packaging architecture for the AI era
by Moh Kolb on 06-16-2026 at 6:00 am

Picture1 VTEMC

For years, advanced packaging has been described mostly in planar terms: chiplets placed side by side, connected through interposers, bridges, redistribution layers, substrates, and short-reach electrical links. This view remains important. It supports today’s GPU, HBM, chiplet, and 2.5D integration architectures.… Read More


Akeana Collaborates with Samsung Electronics, Fast-Tracking RISC-V Customers and Ecosystem for Server and Agentic AI Silicon

Akeana Collaborates with Samsung Electronics, Fast-Tracking RISC-V Customers and Ecosystem for Server and Agentic AI Silicon
by Daniel Nenni on 06-15-2026 at 10:00 am

Akeana Collaborates with Samsung Electronics, Fast Tracking RISC V Customers and Ecosystem for Server and Agentic AI Silicon

The momentum behind RISC-V continues to accelerate as Akeana announced a strategic collaboration with Samsung Electronics aimed at reducing time-to-market for next-generation server and agentic AI silicon. The partnership combines Akeana’s high-performance RISC-V compute platform with Samsung Foundry’s advanced process… Read More