A Six-Minute Journey to Secure Chip Design with CaspiaHardware-level chip security has become an important topic…Read More
Lessons from the DeepChip Wars: What a Decade-old Debate Teaches Us About Tech EvolutionThe competitive landscape of hardware-assisted verification (HAV) has…Read More
Think Quantum Computing is Hype? Mastercard Begs to DisagreeJust got an opportunity to write a blog…Read More
TSMC Kumamoto: Pioneering Japan's Semiconductor RevivalIn the lush landscapes of Kumamoto Prefecture, on…Read More
Gary Smith published a list of what to see at DAC, and I noticed that he listed DOCEA Power in a category of ESL Thermal. I’ll be meeting the DOCEA engineers on Wednesday at DAC to learn more about their two newest ESL products:
In general DOCEA Power tools allow you to manage power and thermal… Read More
At DATEthis year in Dresden, Bernhard Fischer from Siemens CT(Corporate Technology) has presented an interesting summary of the various techniques used for power modeling and analysis at the architectural level. He went through the pros and cons of using spreadsheets, timed virtual platforms annotated with power numbers … Read More
I just came across and interesting video from last year’s Hot Chips conference. Dr. Robert Colwell of DARPA discusses how the processor design industry is likely to change after it becomes too difficult to continue scaling transistors to ever-smaller dimensions. This is likely to occur sometime within the next decade,… Read More
There is a really big conference coming up in San Francisco…no, not DAC although of course that is coming up too. I’m talking about SEMICON West which is much bigger, filling all 3 Moscone exhibit halls. It is July 8-10th. It is, of course, the semiconductor equipment industry (and solar) show.
The opening keynote on… Read More
I talked to Mark Milligan this morning, who has just joined Calypto as VP Marketing. I first met Mark back when he was at CoWare and I was at VaST or maybe it was Virtutech. Then he moved on and ran marketing at SpringSoft which, I’m sure you remember, Synopsys acquired. I asked him what encouraged him to join Calypto.
He said that… Read More
This is the biggest year ever for Methodics at DAC, with lots to show, and a team of people excited to talk to customers and potential customers alike. Methodics will also be giving away Pebble Smartwatches!
Methodics theme for DAC2014 is “IP and design management done right”. A key part of this message is to show how their unique open… Read More
One of the problems with chips today is that of so-called “dark silicon”. We can put massive functionality on an SoC today. A billion transistors, and that is just at 28nm. But power constraints (both leakage and dynamic power) limit how much of the chip can be powered up at any one time. In some cases this is not that big… Read More
One of the things that eSilicon does is handle all the backend operations for the designs that they do. eSilicon is a fabless ASIC company and so the most visible part of the business is the design (not to mention IP which is a critical input into design these days). But another key part is arranging with foundries like TSMC to get the … Read More
I was attending to CDN-Live in Munich last week, so I was expecting Cadence to announce new IP related acquisition like Lip-Bu Tan did last year (Cosmic Circuit, Evatronix and Tensilica). In fact, Lip-Bu was not in Munich and Charlie Huang, SVP Worldwide Field Operations and System & Verification Group, was holding the morning… Read More
An interesting deal was announced last week, another piece in the What is Next for GlobalFoundries? puzzle. IBM is sending up to 200 employees from their East Fishkill R&D facility to GF’s Malta R&D center in Saratoga County. The first thing that comes to my mind is 10nm! Considering GF is licensing Samsung 14nm, what else… Read More
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AI RTL Generation versus AI RTL Verification