The Yield Partnership: Intel and PDF Solutions Tackle Advanced NodesOne of the most difficult things to do…Read More
Webinar: Faster Design Spec to Implementation using IP-XACTAs SoC design flows grow increasingly complex, IP-XACT…Read More
Webinar: Caspia Shows You How to Fix Security Flaws Before It’s Too LateI recently posted an overview of an upcoming…Read More
Feed Forward Intelligence: Enabling Testability in the Chiplets EraThe semiconductor industry is entering a new era…Read More
Synopsys Unifies Electrical, Thermal, Mechanical, and Optical Analysis with Multiphysics Fusion Solutions Market Leaders Including Cisco,…Read More
Intel continues shopping spree with Broadcom
AMAT drops TEL merger due to high remedy cost
Global Foundries wins Apple A9 business at 20nm for 6S & “6C”
Intel follows Altera with Broadcom chaser…..
Sources in the industry have confirmed that Intel is advanced discussions to acquire Broadcom, following… Read More
With worldwide capex growth of 8%, fab equipment spending is expected to increase by 15% in 2015, according to the most recent edition of the SEMI (www.semi.org) World Fab Forecast. SEMI’s data also predicts a slowdown of fab equipment spending in 2016 to low single … Read More
What is Skipper? Well, it seems it’s a penguin in the movie Madagascar. And one of Barbie’s sisters. Who knew? But for Semiwiki readers it’s an integrated chip finishing platform from ICScape. Skipper can read in full-chip layout extremely fast, examine it and manipulate it in various ways, and write it out again.… Read More
For a design engineer engulfed in the daily rigorous routine of having to keep in sync with updates from various design team members as well the dictums of the design management team, the task of remaining up-to-date with the design information is very often daunting.
What design changes have been checked in this week? Is the verification… Read More
As The Who sang on Who’s Next:Keep me movin’, groovin’, groovin’, yeah
Movin’, Yeah
Mobile, mobile, mobile, mobile, …
On April 22nd and 23rd the place to be moving (or movin’) to will be the Hyatt Regency in Santa Clara. Because What’s Next is this year’s Linley Mobile Conference… Read More
With High-Level Synthesis (HLS) the first benefit that comes to my mind is reduced design time, because coding with C or SystemC is more efficient than low-level RTL code. What I’ve just learned is that there’s another benefit, a reduction in the amount of functional simulation required. One HLS customer was able … Read More
The Internet of Things (IoT) juggernaut has unleashed a flurry of low-power microcontrollers, and in that array of energy-efficient MCUs, one product has earned the crown jewel of being the lowest-power Cortex M-based solution with power consumption down to 35µA/MHz in active mode and 200nA in sleep mode.
It’s probably the first time that Synopsys is offering such a direct access to free and open source software. The goal is to support customers developing application code for IoT and embedded devices based on ARC IP core family. The designer can select the Real Time Operating System (RTOS) which best meet the system requirements,… Read More
I previously published a summary of day 1 of SPIE and I wanted to follow up with observations from successive days.
SPIE, the international society for optics and photonics, was founded in 1955 to advance light-based technologies.Serving more than 256,000 constituents from approximately 155 countries, the not-for-profit … Read More
Chip design is largely about assembling pre-designed IP, either developed in other groups in the same company, or brought in from a 3rd party, or occasionally developed within the SoC design group itself. But that makes it sound like it is a bunch of blocks linked together with some interconnect, but of course another important … Read More
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Intel 18A vs Intel 18A-P: What Is the Difference and Why Does It Matter?