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Analysis and Signoff for Restructuring

Analysis and Signoff for Restructuring
by Bernard Murphy on 08-29-2017 at 7:00 am

For the devices we build today, design and implementation are unavoidably entangled. Design for low-power, test, reuse and optimized layout are no longer possible without taking implementation factors into account in design, and vice-versa. But design teams can’t afford to iterate indefinitely between these phases, so they… Read More


Customizable Analog IP No Longer a Pipe Dream

Customizable Analog IP No Longer a Pipe Dream
by Tom Simon on 08-28-2017 at 12:00 pm

Configurable analog IP has traditionally been a tough nut to crack. Digital IP, of course, now provides for wide configurability for varying applications. In the same way that analog design has remained less deterministic as compared to digital design, analog IP has also tended to be less flexible. However, the tide may be turning… Read More


Bluetooth 5 IP is Ready for SoC Integration

Bluetooth 5 IP is Ready for SoC Integration
by Eric Esteve on 08-28-2017 at 7:00 am

Bluetooth®, WiFi, LTE, and 5G technologies enable wireless connectivity for a range of applications. While each offer unique features and advantages, designers need now to decide which protocol to integrate in a single chip after having test the market by using wireless off-chip solutions. Bluetooth 5 builds upon the success… Read More


Oracle is out of the Chip Business!

Oracle is out of the Chip Business!
by Daniel Nenni on 08-26-2017 at 7:00 am

This is a story I have been tracking for some time now. Oracle is one of the companies I was enamored with early in my career, Sun microsystems as well. They are both legacies here in Silicon Valley, absolutely. I can now confirm that Oracle is getting out of the chip business. Oracle got into the chip business with the $7.4B acquisition… Read More


Semiconductor Reliability and Product Qualification

Semiconductor Reliability and Product Qualification
by Daniel Nenni on 08-25-2017 at 7:00 am

This week, we are continuing our discussion of various topics that Semitracks addresses in their training activities. One area that they focus on quite a bit is Semiconductor Reliability and Product Qualification.

One of the key activities that a Product Engineer will coordinate is the qualification of new products before they… Read More


Samsung, Synopsys and Qualcomm at DAC

Samsung, Synopsys and Qualcomm at DAC
by Daniel Payne on 08-24-2017 at 12:00 pm

I’m a user of many Samsung products as my family has Samsung Galaxy smart phones and my MacBook Pro uses Samsung SSD for storage, so at DAC I attended a breakfast panel with presenters from Samsung, Synopsys and Qualcomm. This was the second day of DAC and they served us breakfast, and with the big names on the panel the room was… Read More


Eclipse 2017: Drive All Night!

Eclipse 2017: Drive All Night!
by Roger C. Lanctot on 08-24-2017 at 7:00 am

The reports are coming in now that Apple is working on self-driving car technology in support of developing shuttle buses – not unlike the dozen or so other companies like Local Motors and Navya working on the same idea. The message is clear that the only way to reduce traffic and congestion is to get human beings to pack themselvesRead More


TSMC OIP Ecosystem Forum 2017 Preview!

TSMC OIP Ecosystem Forum 2017 Preview!
by Daniel Nenni on 08-23-2017 at 12:00 pm

The TSMC OIP Ecosystem Forum is upon us again. I have yet to meet a disappointed attendee so it is definitely worth your time: Networking with more than 1,000 semiconductor professionals, the food, mingling with the 50+ EDA, IP, and Services Companies, the food, and of course the content. The 7nm and 7nm EUV updates alone are worth… Read More


A Functional Safety Primer for FPGA – the White Paper

A Functional Safety Primer for FPGA – the White Paper
by Bernard Murphy on 08-23-2017 at 7:00 am

Following up on their webinar on functional safety in FPGA-based designs, Synopsys have now published a white paper expanding on some of those topics. For those who didn’t get a chance to see the webinar this blog follows the white paper flow and is similar but not identical to my webinar blog, particularly around differences between… Read More


Webinar Alert: High Bandwidth Memory ASIC SiPs for HPC and Networking Applications

Webinar Alert: High Bandwidth Memory ASIC SiPs for HPC and Networking Applications
by Mitch Heins on 08-22-2017 at 12:00 pm

Calling all ASIC designers working on High-Bandwidth Memory (HBM) access architectures in high-performance computing (HPC), networking, deep learning, virtual reality, gaming, cloud computing and data center applications. You won’t want to miss this upcoming webinar focused on system integration aspects of a HBM2 ASIC… Read More