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Previewing FMS 2026: The Next Frontier of Enterprise Memory, CXL, and AI-Era StorageFor anyone tracking enterprise infrastructure, the storage landscape…Read More
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Security by Design: Arteris Expands Its Partnership with ArmArteris has expanded its partnership with Arm to…Read More
In advanced technology nodes below 10nm, Design and Process Technology development have become increasingly intertwined. In older nodes the traditional technology roll-out was done mostly in a sequential manner with clear geometry scaling targets set by … Read More
In a rare and perhaps unfortunate moment of candor, Cruise Automation CEO Dan Ammann wrote, in his blog post describing the emergence of Cruise (a subsidiary of General Motors) that conventional internal combustion engine vehicles “break down relatively easily. And if they make it 150,000 miles, well, lucky you.”
Ammann goes… Read More
I wrote recently on ANSYS and TSMC’s joint work on thermal reliability workflows, as these become much more important in advanced processes and packaging. Xilinx provided their own perspective on thermal reliability analysis for their unquestionably large systems – SoC, memory, SERDES and high-speed I/O – stacked within a … Read More
Machine Learning (ML) has become extremely important for many computing applications, especially ones that involve interacting with the physical world. Along with this trend has come the development of many specialized ML processors for cloud and mobile applications. These chips work fine in the cloud or even in cars or phones,… Read More
At DesignCon 2020, ANSYS sponsored a series of very high-quality presentations. Some focused on advanced methods and new technology exploration and some provided head-on, practical and actionable capabilities to improve advanced designs. The presentation I will discuss here falls into the latter category. The topic was… Read More
This blog is the next in a series in which Paul Cunningham (GM of the Verification Group at Cadence), Jim Hogan and I pick a paper on a novel idea in verification and debate its strengths and opportunities for improvement.
Our goal is to support and appreciate further innovation in this area. Please let us know what you think and please… Read More
This article will describe the motivations for pursuing a new flow in the SoC design methodology. This flow involves the extraction, evaluation, and analysis of a full electromagnetic coupling model for a complex SoC and its package environment. The results of this analysis highlight the impact of electromagnetic coupling… Read More
The last session I attended at DesignCon 2020 wasn’t a session at all. Rather it was an interactive discussion with Todd Westerhoff, product manager for electronic board systems at Mentor Graphics. Todd made some observations about the way high-performance PCBs are designed today and perhaps the way they should be designed. … Read More
In a week where the new coronavirus and it’s impact has dominated the news, here is my weekly summary of the key semiconductor and technology news from around the world that you should know but may have missed.
The new coronavirus in China and worldwide is already causing an impact for the electronics supply chain, potentially affecting… Read More
The semiconductor industry lost another good one last week, my friend, co-worker, and longtime SemiWiki contributor, Randy Smith. Randy published sixty blogs on SemiWiki over the last eight years that have been viewed more than a half million times. That is quite a digital legacy, absolutely.
Like myself, and many other semiconductor… Read More
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ASML High-NA EUV is Not Ready for High-Volume Production