Events EDA2025 esig 2024 800X100
Semiconductor Expert Forum

Podcast EP228: A New, Fast and Accurate Approach to Power Analysis with Innergy Systems’ Ninad Huilgol

Podcast EP228: A New, Fast and Accurate Approach to Power Analysis with Innergy Systems’ Ninad Huilgol
by Daniel Nenni on 06-14-2024 at 10:00 am

Dan is joined by Ninad Huilgol, founder and CEO at Innergy Systems. Ninad has extensive experience in design verification of ultra low-power mobile SoCs. Previously, he has worked in senior engineering management at various semiconductor companies such as Broadcom and Synopsys. He has multiple power- and design-related patents,… Read More

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Silicon Catalyst Announces Winners of the 2024 Arm Startups Contest

Silicon Catalyst Announces Winners of the 2024 Arm Startups Contest
by Daniel Nenni on 06-14-2024 at 6:00 am
Categories: Arm, Semiconductor Services, Silicon Catalyst

Silicon Catalyst Logo

The Silicon Catalyst-Arm start-up contest winners were announced this week. This was the first contest of its kind so there was quite a bit of excitement. SemiWiki has worked closely with Silicon Catalyst for the past four years which has been quite the journey. Out of the one hundred plus companies SemiWiki has worked with over … Read More

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Synopsys-AMD Webinar: Advancing 3DIC Design Through Next-Generation Solutions

Synopsys-AMD Webinar: Advancing 3DIC Design Through Next-Generation Solutions
by Kalar Rajendiran on 06-13-2024 at 10:00 am
Categories: 3D IC, AI, Chiplet, EDA, Synopsys

The Synopsys Multi Die Solution

Introduction of 2.5D and 3D multi-die based products are helping extend the boundaries of Moore’s Law, overcoming limitations in speed and capacity for high-end computational tasks. In spite of its critical function within the 3DIC paradigm, the interposer die’s role and related challenges are often neither fully comprehended… Read More

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INTERVIEW: Bluespec RISC-V soft cores in Achronix FPGAs

INTERVIEW: Bluespec RISC-V soft cores in Achronix FPGAs
by Don Dingee on 06-13-2024 at 6:00 am
Categories: Achronix, AI, eFPGA

Achronix Bluespec partnership highlights

Recently, a partnership between Achronix and Bluespec has been in the news. Bluespec RISC-V processors are available as soft cores in a Speedster®7t FPGA on Achronix’s VectorPath® PCIe development card or in a standalone Speedster7t FPGA. We spoke with executives from Achronix and Bluespec about the impetus for this effort … Read More

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Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification

Reduce Risk, Ensure Compliance: Hardware-Assisted Verification for Design Certification
by Lauro Rizzatti on 06-12-2024 at 10:00 am
Categories: 5G, EDA, Emulation, FPGA, Synopsys

Reduce risk ensure compliance Figure 1
Prologue

Peter was running late for two reasons. First, he encountered unexpected heavy traffic and arrived ten minutes late for a crucial meeting with a customer to run a compliance test of his new 6G phone design prototyped on FPGAs. This prototype’s success was pivotal, as it could secure a significant purchase order.… Read More

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Automotive Autonomy’s Quiet Advance Through Radar

Automotive Autonomy’s Quiet Advance Through Radar
by Bernard Murphy on 06-12-2024 at 6:00 am
Categories: AI, Automotive, Ceva, IP

Car radar wireframe min

Given false starts and OEM strategic retreats you could be forgiven for thinking that the autonomous personal car dream is now a lost cause. But that’s not quite true. While moonshot goals have been scaled back or are running under wraps, applications continue to advance, for adaptive cruise control, collision avoidance, automatic… Read More

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Something new in High Level Synthesis and High Level Verification

Something new in High Level Synthesis and High Level Verification
by Daniel Payne on 06-11-2024 at 10:00 am
Categories: EDA, Siemens EDA

catapult covercheck min

As SoC complexities continue to expand to billions of transistors, the quest for higher levels of design automation also rises. This has led to the adoption of High-Level Synthesis (HLS), using design languages such as C++ and SystemC, which is more productive than traditional RTL design entry methods. In the RTL approach there… Read More

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Mastering Atomic Precision – ALD’s Role in Semiconductor Advancements

Mastering Atomic Precision – ALD’s Role in Semiconductor Advancements
by Admin on 06-11-2024 at 8:00 am
Categories: EMD Electronics, Semiconductor Services

Application Areas Photo (1)

Atomic layer deposition (ALD) is a thin-film deposition method that continues to enable continuous advances in semiconductor device fabrication. Essentially, it involves exposing substrates sequentially to at least two different vapor phase atmospheres in which self-limiting reactions take place on the surface: the first… Read More

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WEBINAR: Redefining Security – The challenges of implementing Post-Quantum Cryptography (PQC)

WEBINAR: Redefining Security – The challenges of implementing Post-Quantum Cryptography (PQC)
by Daniel Nenni on 06-11-2024 at 8:00 am
Categories: Events, Secure-IC, Security

Secure IC SemiWiki

In the late 1970s, cryptographic history saw the emergence of two seminal algorithms: McEliece and RSA. At that time, quantum threats were theoretical, and the selection criteria for cryptographic algorithms prioritized public key length and execution time, leading to RSA’s prominence while McEliece remained obscure… Read More

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How IROC Makes the World a Safer Place with Unique Soft Error Analysis

How IROC Makes the World a Safer Place with Unique Soft Error Analysis
by Mike Gianfagna on 06-11-2024 at 6:00 am
Categories: EDA, IROC Technologies

Soft Error Analysis

I recently had an eye-opening discussion regarding the phenomena of soft errors in semiconductor devices. I always knew this could be a problem in space, where there are all kinds of high energy particles. What I didn’t realize is there are two trends that are making this kind of problem relevant on the ground as well as in space. The… Read More