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Synopsys and Samsung Foundry Extend AI-Driven Design Collaboration for Advanced 2nm and Multi-Die Systems

Synopsys and Samsung Foundry Extend AI-Driven Design Collaboration for Advanced 2nm and Multi-Die Systems
by Daniel Nenni on 06-08-2026 at 10:00 am

Key takeaways

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At SAFE Forum 2026, Synopsys announced significant advancements in its collaboration with Samsung Foundry, expanding AI-powered design, verification, test, and IP solutions for Samsung’s most advanced process technologies. The announcement underscores the growing importance of electronic design automation (EDA), design technology co-optimization (DTCO), and multi-die methodologies as semiconductor companies push toward increasingly complex AI, HPC, automotive, and data-center applications.

A key focus of the collaboration is support for Samsung Foundry’s second- and third-generation 2nm process technologies. Synopsys has delivered production-ready digital and analog implementation flows optimized for these nodes, enabling customers to achieve improved power, performance, and area (PPA) while accelerating time-to-market. The flows leverage Synopsys’ AI-driven optimization technologies to automate design exploration and implementation tasks that have traditionally required extensive engineering effort.

The companies highlighted several DTCO initiatives that integrate process technology knowledge directly into synthesis, physical implementation, and signoff flows. By tightly coupling Samsung’s advanced process characteristics with Synopsys implementation tools, customers can optimize designs earlier in the development cycle and achieve measurable PPA improvements. These DTCO methodologies are increasingly critical as advanced-node scaling introduces new challenges related to power delivery, variability, thermal effects, and manufacturing complexity.

Multi-die design was another major theme of the announcement. As AI accelerators and high-performance computing devices exceed the practical limits of monolithic SoCs, semiconductor developers are increasingly adopting chiplet-based architectures. Synopsys and Samsung Foundry have expanded their collaboration to support advanced packaging and 3D integration technologies through integrated design flows that span silicon, package, and system domains. The companies are enabling scalable multi-die implementations using certified multiphysics signoff solutions within Synopsys 3DIC Compiler, allowing designers to evaluate electrical, thermal, and mechanical interactions across heterogeneous die assemblies.

The collaboration also reflects a broader shift toward system technology co-optimization (STCO), which extends beyond traditional DTCO by considering interactions among dies, interconnects, packaging technologies, power delivery networks, and thermal management. This holistic approach is particularly important for AI workloads that demand unprecedented compute density, memory bandwidth, and energy efficiency. By enabling system-level analysis earlier in the design process, Synopsys and Samsung Foundry aim to help customers reduce design iterations while improving overall system performance.

Beyond design implementation, Synopsys showcased advancements in AI-powered test and manufacturing solutions. The companies reported that customers are achieving test-efficiency improvements of up to 20% through the use of silicon-based, AI-driven test optimization technologies validated on Samsung Foundry processes. These capabilities reduce test patterns and test-cycle requirements while maintaining fault coverage, contributing to lower manufacturing costs and improved production throughput for advanced SoCs and multi-die devices.

The ecosystem expansion also includes a broader portfolio of certified interface IP and foundation IP optimized for Samsung’s advanced process nodes, including automotive technologies. As AI and automotive applications increasingly require high-bandwidth connectivity, functional safety, and robust security features, access to production-proven IP becomes a critical enabler for faster design deployment and reduced integration risk.

Bottom line: Presented under the SAFE Forum 2026 theme, “The Nexus for Silicon Intelligence,” the collaboration demonstrates how AI-driven EDA, advanced process technologies, and heterogeneous integration are converging to address the escalating complexity of next-generation semiconductor systems. Through deeper co-optimization across design, packaging, test, and manufacturing, Synopsys and Samsung Foundry are providing customers with a comprehensive platform for developing the AI and multi-die architectures that will power future computing infrastructure.

Synopsys and Samsung Foundry Extend AI-Driven Design Collaboration for Advanced 2nm and Multi-Die Systems

Also Read:

The Great Divide: A Tale of Three Hardware Emulation Architectures

Synopsys and TSMC Deepen AI Design Alliance: What It Means

How to Overcome the Advanced Node Physical Verification Bottleneck

 

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