Synopsys at Design Automation Conference 2026

Synopsys is catalyzing the era of pervasive intelligence with comprehensive engineering solutions spanning silicon design, IP, and simulation and analysis. At this year’s Design Automation Conference (DAC), the company will showcase innovations transforming silicon and systems development for a wide range of applications including physical AI, automotive, data center, and consumer devices.

As the industry moves toward sub-micron process technologies and chiplet-based architectures, engineers face unprecedented complexity driven by physics-related effects, increasing verification cycles, mounting time-to-market pressures, and more. These challenges are driving a rethink of traditional engineering approaches, with trends such as agentic AI and multiphysics-aware co-design reshaping development workflows.

Live Demos: Agentic AI, Multiphysics Fusion, and Cloud-based EDA

Come by Booth #631 to see these innovations in action. Whether you’re a startup, foundry, or hyperscaler, we invite you to receive a live demonstration of the following:

Agentic AI Transforming Chip Design

This demo will show how agentic AI is transforming chip design – illustrating intelligent orchestration across multiple EDA agents with adaptive learning to generate Register Transfer Level (RTL) code from natural language and formal specification, run Lint checks to ensure clean RTL, generate unit-level testbenches, and iteratively run verification to converge on target objectives.

First Public Demonstration of Multiphysics Fusion Solutions

To be shown for the first time at this year’s DAC, the newly unveiled Multiphysics Fusion portfolio combining Synopsys’ AI-powered design platforms with Ansys signoff-grade multiphysics analysis will demonstrate workflows for 3DIC design, design closure, and custom photonics.

Simulation & Analysis Portfolio for Next-Generation Electronic Systems

This demo will show a unified multiphysics simulation and analysis portfolio for next-generation electronic systems across chip, package, and board. It highlights high data-rate link analysis, including 3D simulation of advanced IC systems to capture multiphysics effects, workflows for PCB design and reliability, and scalable data processing systems that accelerate analysis of large datasets.

Synopsys Cloud Accelerates Tape-Outs by Months

As semiconductor designs grow more complex, time-to-results (TTR) has become a major bottleneck across chip design workflows. This demo will show how the Synopsys Cloud Platform improves engineering productivity, and highlights include will chip design tools integrated in GitHub-based hardware, elastic compute and scalable licenses, and simplified access to Synopsys.ai solutions.

Expert Insights: Advanced Packaging, Hardware-Assisted Verification, Memory, Quantum, & More

You can also connect with Synopsys experts who are leading technical presentations and participating in engaging panels. Example sessions below and you can view our full speaker lineup here.

Is the EDA Industry Fundamentally Ill-Prepared for True 3D Heterogeneous Integration?

Panelists: Henry Sheng, Synopsys + USC, CMU, Qualcomm, Broadcom, Cadence

Tuesday, 7/28 10:30am – 12:30pm PDT

Advancements in Emulation and Prototyping for Semiconductor: Hardware Tools, Challenges, and FPGA Solutions

Presenters: Sabya Das, Synopsys + Narendra Konda, NVIDIA

Tuesday, 7/28 4:00pm – 4:30pm PDT

How Silicon Startups are Addressing the AI Memory Gap

Presenters: Vikram Bhatia, Synopsys + Wenbo Yin, TetraMem + R. Scott Hills, ANAFLASH

Tuesday, 7/28 5:15pm – 5:45pm PDT

Bridging Quantum, AI, and EDA: The Next Frontier of Design Automation

Panelists: Jimmy Cheng, Synopsys + Google/UMass Amherst, IBM Research, Qolab, QC Ware, Applied Materials

Wednesday, 7/29, 10:30am – 12:30pm PDT

To book a meeting with Synopsys at DAC 2026, please contact globalevents@synopsys.com.

Also Read:

From Detection to Safety: Reframing Fault Simulation for Functional Safety

Foundation IP for Intel 18A: Technical Overview and Why It Matters

When Software Outruns Silicon: Hardware-Assisted Test Generation to the Rescue

All-Embracing Multiphysics Analysis for Chiplet-Based Systems