Webinar: Compensating for PCB laminate anisotropy in SI calculations

Why Your Impedance Models May Be Less Accurate Than You Think

For many years, the PCB industry has accepted dielectric values without fully understanding how they were measured—or whether they’re the right values for impedance modeling. This webinar explores what that means for today’s high-speed designs.

As signaling speeds continue to increase, even small errors in dielectric modeling can translate into measurable impedance errors, degraded simulation correlation, and reduced design margins. Most PCB design teams rely on laminate data supplied by material vendors and fabricators—but few engineers understand how those dielectric values were measured, what they actually represent, or whether they’re appropriate for impedance modeling. In this webinar, Bill Hargin, founder of Z-zero and developer of Z-planner Enterprise, explains why dielectric measurement orientation matters, how laminate anisotropy affects transmission-line modeling, and what design teams can do to improve impedance prediction accuracy. Drawing on extensive research across hundreds of laminate materials and nearly thirty dielectric characterization methods, Bill explains why many published Dk values are not directly applicable to signal-integrity analysis—and why understanding the difference between Dk(x-y) and Dk(z) is becoming increasingly important for today’s high-speed designs.

What You’ll Learn

• Why many published laminate Dk values introduce impedance error
• The difference between Dk(x-y) and Dk(z)—and why it matters
• How dielectric measurement methods influence laminate datasheets
• Why resin content, glass style, copper roughness, and frequency affect impedance
• Practical techniques for improving simulation accuracy and fabrication correlation
• How next-generation impedance planning tools address these challenges

Who Should Attend

• Hardware Design Engineers
• Signal Integrity Engineers
• PCB Designers
• PCB Fabricators
• CAD and Library Engineers
• High-speed digital design teams
• Anyone responsible for PCB stackup planning or impedance control

Why Attend?

If you’ve ever wondered why simulated impedance doesn’t always match fabricated hardware—or whether the dielectric numbers in your stackups tell the whole story—this webinar will provide practical answers backed by research, engineering data, and real-world examples. Whether you’re designing 56G, 112G, 224G, or simply trying to build more predictable hardware, you’ll leave with a better understanding of the physics behind modern PCB impedance planning. Reserve your seat today.

REGISTER HERE