
Accellera Systems Initiative invites the design and verification community to join us at the 2026 Design Automation Conference for a focused technical luncheon, “Embracing AI for Advanced Design and Verification,” on Tuesday, July 28, from 12:30–1:45 p.m. at the Long Beach Convention Center, Meeting Room 104C.
Artificial intelligence is rapidly becoming a transformative force across the electronic design automation ecosystem. From generative design assistance and automated test creation to machine-learning-driven debug, coverage analysis, performance optimization, and system-level exploration, AI is changing how engineering teams approach increasingly complex semiconductor development. As AI techniques become embedded in design and verification workflows, the industry must address a new generation of challenges related to interoperability, data representation, model exchange, repeatability, explainability, and trust.
This luncheon will explore how AI is reshaping not only engineering practice, but also the standards landscape that supports scalable and reliable design automation. Standards have long played a critical role in enabling methodology reuse, tool interoperability, IP integration, verification portability, and ecosystem collaboration. As AI is introduced into EDA flows, similar standardization needs are emerging around how design intent, verification intent, constraints, coverage data, debug information, training data, model outputs, and tool-generated recommendations are represented and exchanged.
AI-enabled EDA introduces opportunities to accelerate productivity, but it also raises important technical questions. How should AI-generated design or verification content be validated? What metadata is required to support traceability and reproducibility? How can organizations compare results across tools and methodologies when AI models may be probabilistic or continuously evolving? What common interfaces or data schemas are needed to allow AI-assisted workflows to operate across heterogeneous toolchains? And where can standards help prevent fragmentation as industry and academia explore new AI-driven approaches?
Moderated by Mike Gianfagna of SemiWiki, the panel will feature perspectives from leaders working at the intersection of semiconductor design, EDA, AI, and standards. Panelists include Dr. Jiang Hu, IEEE Fellow and Eric Rubin Professor at Texas A&M University; David Zhi LuoZhang, CEO of Bronco AI; and Simon Davidmann, AI+EDA researcher. Together, they will examine how AI is influencing advanced design and verification methodologies and where collaborative standardization may be most valuable.
The discussion will consider both near-term and long-term implications. In the near term, AI can help engineers improve efficiency in areas such as assertion generation, testbench development, coverage closure, failure triage, layout optimization, and documentation analysis. Longer term, AI may enable more autonomous flows in which tools reason across abstraction levels, optimize system architectures, identify verification gaps, and recommend corrective actions. For these capabilities to be trusted in production environments, the industry will need robust mechanisms for exchanging data, preserving engineering intent, recording provenance, and validating outcomes.
Audience participation will be an important part of the luncheon. Attendees will have the opportunity to share their views on where standardization is most needed across commercial EDA, semiconductor development, IP reuse, academic research, and emerging AI-enabled methodologies. Input from users, vendors, researchers, and system companies is essential to understanding the practical requirements that should guide future standards work.
This event is intended for engineers, architects, verification leaders, EDA developers, methodology experts, researchers, and managers interested in the technical and strategic impact of AI on design and verification. Whether your organization is already deploying AI-enabled tools or beginning to evaluate their role in future flows, this discussion will provide valuable insight into the standards challenges and opportunities ahead.
Seating is limited and available on a first-come, first-served basis. Signing up does not guarantee a seat, but we encourage interested attendees to register so Accellera can provide updates about the luncheon and estimate attendance.
Also Read:
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Accellera Strengthens Industry Collaboration and Standards Leadership at DVCon U.S. 2026
Podcast EP330: An Overview of DVCon U.S. 2026 with Xiaolin Chen
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