Accellera Systems Initiative is an independent, not-for profit organization dedicated to create, support, promote, and advance system-level design, modeling, and verification standards for use by the worldwide electronics industry. We are composed of a broad range of members that fully support the work of our technical committee to develop technology standards that are balanced, open, and benefit the worldwide electronics industry. Leading companies and semiconductor manufacturers around the world are using our electronic design automation (EDA) and intellectual property (IP) standards in a wide range of projects in numerous application areas to develop consumer, mobile, wireless, automotive, and other “smart” electronic devices. Through an ongoing partnership with the IEEE, standards and technical implementations developed by Accellera Systems Initiative are contributed to the IEEE for formal standardization and ongoing governance.
At Accellera our mission is to provide a platform in which the electronics industry can collaborate to innovate and deliver global standards that improve design and verification productivity for electronics products.
The purposes of the organization include:
- Provide design and verification standards required by systems, semiconductor, IP, and design tool companies to enhance a front-end design automation process.
- Collaborate with our community of companies, individuals, and organizations to deliver standards that lower the cost of designing commercial IC and EDA products and embedded system solutions, as well as increase the productivity of designers worldwide.
- Encourage availability and adoption of next-generation EDA and IP standards that encompass system-level, RT-level, and gate-level design flows.
- Collaborate with the electronic design community to deliver standards that increase designer productivity and lower the cost of product development.
- Provide mechanisms that enable the continued growth of the Accellera Systems Initiative user community including SystemC, Universal Verification Methodology (UVM), and IP-XACT.
- Standardize technical implementations developed by Accellera Systems Initiative through the IEEE.
A Rich History of Standards
Accellera Systems Initiative has evolved into the robust organization it is today to meet the needs of its members and the EDA and IP community. Starting with the merger of OVI and VHDL International (VI) to form Accellera Organization, it has since joined with The SPIRIT Consortium and then with the Open SystemC Initiative (OSCI) to become Accellera Systems Initiative.
Accellera Standards Success
The Accellera Ecosystem
Technical experts from member companies all over the world participate in the development of Accellera System Initiative standards through the dedicated work of our Technical Committee. Companies around the world are using our standards for designing electronic systems such as printed circuit boards and integrated circuits (ICs) that have become an integral part of today’s “smart” devices.
Ongoing Technical Activities
Design of silicon chips can be done at various levels of abstraction with technology standards factoring into each layer of design. Accellera Systems Initiative accelerates development of interoperable standards at the front end of the design process, from circuit design, where chips are conceptualized, to System-on-Chip (SoC) integration. Through common testbench technologies, such as verification, the continuity and integrity between the different abstraction levels of the chip are ensured. Standards developed by Accellera boost engineering productivity, increase chip functionality, lower power, and ultimately reduce the cost of electronic products to the overall consumer.
Accellera Systems Initiative
EDA and IP Design Standards and Initiatives
Accellera Systems Initiative Standards and Implementations
- Universal Verification Methodology (UVM) 1.1
- Open Verification Library (OVL) 2.7
- Standard Co-Emulation Modeling Interface (SCE-MI) 2.2
- Unified Coverage Interoperability Standard (UCIS) 1.0
- IP-XACT – Update of IEEE 1685 and Recommended Vendor Extensions
- Intellectual Property (IP) Tagging 1.0
- Multi-Language (launched)
- SystemC Synthesizable Subset Draft 1.3
- SystemC Transaction-level Modeling (TLM) 2.0*
- SystemC Analog Mixed-Signal (AMS) 2.0
- SystemC Configuration, Control & Inspection (CCI Requirements)
- SystemRDL 1.0
- Verilog-AMS (V-AMS) 2.3.1
- Open Source Companions:
- SystemC Reference Implementation 2.3.0 (* now includes TLM)
- SystemC Verification Library 1.0p2
- UVM Reference Implementation 1.1d
- Open Verification Library (OVL) 2.7
Completed IEEE Standards
- IEEE 1076: VHDL Language Reference Manual
- IEEE 1364-2005: Verilog Hardware Description Language
- IEEE 1450.6.1: Open Compression Interface (OCI)
- IEEE 1497: Standard Delay Format (SDF)
- IEEE 1666-2011: SystemC language
- IEEE 1685: IP-XACT
- IEEE 1800: SystemVerilog (SV)
- IEEE 1801: Unified Power Format (UPF)
- IEEE 1850: Property Specification Language (PSL)