Submit proposals by September 7, 2026, and help shape the future of design and verification
Gainesville, FL - June 9, 2026 - The 2027 Design and Verification Conference and Exhibition United States (DVCon U.S.), sponsored by Accellera Systems Initiative, is pleased to announce its Call for Extended Abstract, Workshop, and Tutorial Proposals. The 39th annual DVCon U.S. will be held March 1-4 at the Hyatt Regency, Santa Clara, CA.
“We are living in exciting times,” stated Xiaolin Chen, DVCon U.S. 2027 General Chair. “With the rapid growth of AI driving new technology development, increasing design complexity, and reshaping engineering workflows, the need to share knowledge and proven practices has never been greater. The DVCon U.S. Steering Committee and Technical Program Committee welcome your submissions that showcase innovative applications and share real-world experiences that help educate, inspire, and contribute to a dynamic and engaging technical program.”
Extended Abstract Information
DVCon U.S. 2027 invites engineers, researchers, and practitioners to submit extended abstracts describing innovative methodologies, practical applications, and real-world experiences in the design and verification of electronic systems and integrated circuits. Submissions should be highly technical and demonstrate how languages, tools, methodologies, and standards are being applied to address current engineering challenges.
Suggested topic areas include, but are not limited to:
• Functional verification and validation
• Safety-critical design and verification
• Low-power design techniques
• Machine learning and AI applications in design and verification
• Design and verification reuse and automation
• Mixed-signal design and verification
Topics may also include EDA tool usage, FPGA-based design, hardware/software co-verification, Portable Stimulus applications, specialized verification languages (such as SVA and PSL), scripting and automation techniques, AMS methodologies, open-source solutions, and IP-based SoC design approaches.
Extended abstracts should be between 600 and 1,200 words and demonstrate technical depth, innovation, and relevance to the design and verification community.
More information and submission guidelines for DVCon U.S. 2027 can be found here.
Sponsored Short Workshop and Tutorial Information
DVCon U.S. 2027 welcomes proposals for technical tutorials and sponsored short workshops that provide high-quality educational content for design and verification professionals. These sessions offer industry experts an opportunity to share real-world experiences, innovative methodologies, and practical solutions to today's most significant engineering challenges.
Sponsored short workshops are 90-minute sessions held on Monday and Thursday and are open to all attendees registered for the full conference. Workshops may be presented in either lecture-style or hands-on formats, providing flexibility for both presenters and participants.
DVCon U.S. technical tutorials are three-hour sessions included with full conference registration. The Technical Program Committee is seeking proposals that are current, highly relevant, and rich in continuing education value. Attendee expectations are high regarding technical depth, practical applicability, and the breadth of real-world examples presented.
Suggested topics for workshops and tutorials include:
• SystemVerilog for design and verification
• SystemC, C, and C++ in system-level design and verification
• Software-driven and SoC verification
• Assertion-based verification (SystemVerilog Assertions, PSL, etc.)
• Coverage-driven verification and debug techniques
• Low-power design and verification techniques
• High-level synthesis
• Mixed-signal modeling and verification
• Transaction-level modeling (TLM), ESL design, and IP integration (IP-XACT)
• Portable Stimulus and standards-based methodologies
• Formal methods, static analysis, emulation, FPGA prototyping, and post-silicon debug
• Embedded software verification and hardware/software co-development
• Functional safety and security
• Verification productivity methods and automation
• Open-source hardware, software, and architecture
• Machine learning applications for design and verification
Proposals should include a two- to five-paragraph abstract (maximum 1,000 words) describing the session objectives, technical content, intended audience, and educational value. Additional details on DVCon U.S. 2027 workshop and tutorial proposal guidelines, including pricing information, can be found here.
Submission Deadline
The submission site for all proposals opens July 15, 2026. The deadline for submitting extended abstracts, tutorial proposals, and workshop proposals is September 7, 2026.
To explore proceedings and presentations from previous DVCon conferences, visit the archives site.
About DVCon
DVCon is the premier conference for discussion of the functional design and verification of electronic systems. DVCon is sponsored by Accellera Systems Initiative, an independent, not-for-profit organization dedicated to creating design and verification standards required by systems, semiconductor, intellectual property (IP), and electronic design automation (EDA) companies. For more information about Accellera, please visit www.accellera.org. For more information about DVCon U.S., please visit here. Follow DVCon on Facebook, LinkedIn or @dvcon_us on X or to comment, please use #dvcon_us.