Basilisk at Hot Chips 2025 Presented Ominous Challenge to IP/EDA Status QuoAt Hot Chips 2025, Philippe Sauter of ETH…Read More
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Synopsys Enables AI Advances with UALinkThe evolution of hyperscale data center infrastructure to…Read More
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Dan is joined by Jeff Critten, VP of sales at Corigine. They discuss the unique capabilities of Corigine that allows support of both emulation and prototyping in one platform.
Jeff Critten has been in the EDA industy for over 25yrs. He started with Cadence as a verification AE in 1997 and moved into a sales role where he was promoted… Read More
Curvilinear Design Primer for Design, Packaging Communities
This interview was done by Bob Smith, Executive Director, ESD Alliance, a SEMI Technology Community.
Previously, Fujimura served as CTO at Cadence Design Systems and returned to Cadence for the second time through the acquisition of Simplex Solutions where he was… Read More
In our previous blog installments, we examined the ingredient for modeling the potential for interference between a 5G C-band base station and an aviation radar altimeter. Using candidate emissions models for the transmitter, wideband susceptibility models for a candidate radar altimeter receiver and antenna and propagation… Read More
Typically, there is an existential rift between the on-chip access requirements for test and the need for security in SoCs. Using traditional deterministic scan techniques has meant opening up full read and write access to the flops in a design through the scan chains. Having this kind of access easily defeats the best designed… Read More
In our previous blog installment, we introduced the components of RF interference modeling, and established models for wideband peak emissions of a 5G C-band transmitter and the wideband receiver susceptibility for a radar altimeter receiver. Here, we consider the third component: the wireless channel, which considers the… Read More
Harry Foster opened and wrapped a tutorial at DVCon 2022 on “The Best Verification Strategy You’ve Never Heard Of”. Harry started with a common refrain on verification; we face a crisis thanks to a combination of growing complexity in the systems we are able to design, yet double exponential growth in verification cost for… Read More
In our first blog installment, we outlined the interference concerns surrounding the coexistence of the new C-band 5G telecom service spanning the band from 3.7 to 3.98 GHz with aviation radar altimeters. Radar altimeters are essential components for safety during landing and takeoff, as they offer precise measurements from… Read More
Ever since the cost of development started growing exponentially, engineering teams have been deploying a shift-left strategy to software development and system verification. While this has helped contain cost and accelerated product development schedules, a shift-left strategy is not without challenges. A virtual platform… Read More
The new 5G C-band service is now up and running in the U.S., and subscribers are finally starting to see some of the promise of 5G. The new C-band services are primarily in spectrum allocations between 3 and 4 GHz, providing the wider channel allocation bandwidths necessary to deliver significantly higher data throughput. At the… Read More
The growth of complexity for silicon test as it relates to test data volume and test times is driven by multiple concurrent factors. One dimension is simply the increase in silicon complexity. However, other factors are playing a role as well. These include higher reliability requirements for new applications such as automotive,… Read More
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Intel’s Pearl Harbor Moment