Arteris at DAC 2026 Connecting Innovation for Silicon SuccessThe semiconductor industry has entered a new era…Read More
DAC 2026 Mach42: A new generation of physics-driven AI models for analog circuit verificationMach42 spun out of the Department of Physics…Read More
Synopsys at Design Automation Conference 2026Synopsys is catalyzing the era of pervasive intelligence…Read More
DAC 2026: Join Accellera for a dynamic luncheon exploring how artificial intelligence is reshaping the standards landscape for design and verification.Accellera Systems Initiative invites the design and verification…Read More
Enabling AI to Understand Complex Runtime Behavior for Accurate, Automated Root Cause Analysis — DAC 2026Undo gives AI coding agents the runtime context…Read More
Still not convinced on the value of FPGA-based prototyping systems, or using older technology? I’ve been trying to find the story beyond just bigger, badder FPGAs in a box that you pour RTL into – and found some hints in a webinar on the Synopsys HAPS-70 from earlier this year.… Read More
Engaging with the semiconductor ecosystem is critical to surviving in the fast paced times we work in. Face to face interaction at all levels is key and semiconductor IP is a prime example. How do you ensure that your IP meets objective quality requirements before integration into your SoC, and that your SoC is ready for handoff to… Read More
Jim Hogan is having his annual Heart of Technology charity barbecue at his home in Santa Cruz. This year it is on Saturday August 31st and it’s a luau. It is from 2pm to 8pm at 2171 Sunny Acres Drive, Santa Cruz. Each adult requires a tax-deductible donation of $50 to FleaHab of Santa Cruz County (kids are free).
In addition to Hawaiian… Read More
IC designers have been creating with hierarchy for years to better manage large design sizes, however for the test world the concept of hierarchy and emerging standards is a bit newer. TSMC and Synopsys jointly created a webinarthat addresses hierarchical test, so I’ve attended it this week and summarized my findings here.… Read More
At the recent GSA Entrepreneurship Forumone of the panelists was Angel Orrantia of Innopartners who are trying a novel approach to funding startups in the semiconductor space and the surrounding ecosystem.
It seems things got started with an innovation center inside SK Hynix. Just in case you have forgotten, Hynix is the newish… Read More
There never seems to be enough time in a SoC project to simulate all of the cycles and tests that you want to run, so any technique to accelerate each run is welcomed. You can just wait for your software-based RTL simulator to finish running, or you can consider using a hardware-based accelerator approach. I learned more about one such… Read More
Timing exceptions are ways of guiding design tools, primarily synthesis and static timing analysis (STA), but these days also place & route and perhaps other tools. Most paths in a design go from one register to the next register. Both registers are on the same clock, and the design needs to ensure that the signal can make it from… Read More
[The VLC developed by Edison2, winner of the Progressive Automotive X-Prize]
Now that we have “The Very Light Car” of the world at more than 100 MPG!! Yes, this is the car developed by Edison2, one among the three winners of the Progressive Insurance Automotive X-Prize, a global competition; Edison2 won in the main stream class. … Read More
How do you benchmark a processor? It seems like it should be easy, just run some code and see how fast it is. Traditionally processors were indeed benchmarked by raw performance like GMACS, GFLOPS, memory bandwidth and so on. But in today’s world where systems have become very complex and applications very compute intensive, the… Read More
Cadence is 25 years old this year, on June 1st if you want to be precise.
The most direct ancestor of Cadence was SDA (which might or might not have stood for Solomon Design Automation). SDA was founded by Jim Solomon in 1983. It turns out that a guy I shared an office with while we were both doing our PhDs in Edinburgh Scotland was one of … Read More
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TSMC CoWoS versus Intel EMIB Semiconductor Packaging