As a calm settles over the mobile market, post the overhyped Samsung Galaxy S4 launch, many analysts are at a loss as to describe a way forward with Apple that is understandable and positive. The dozens of reports that focus on the summer launches of the iPhone 5S and cheap iphone miss the side of the barn on the true strategy being put… Read More



Will 14nm Yield?
If I had a nickel for every time I heard the term “FinFET” at the 2013 SNUG (Synopsys User Group) Conference I could buy a dozen Venti Carmel Frappuccinos at Starbucks (my daughter’s favorite treat). In the keynote, Aart de Geus said FinFET 14 times and posed the question: Will FinFETs Yield at 14nm? So that was my mission, ask everybody… Read More
In compliance we trust, for integration we verify
So, you dropped that piece of complex IP you just licensed into an SoC design, and now it is time to fire up the simulator. How do you verify that it actually works in your design? If you didn’t get verification IP (VIP) with the functional IP, it might be a really long day.
Compliance checking something like a PCIe interface block is a … Read More
Moore Push Versus Market Pull
I was at SNUG earlier today at both Aart’s keynote that opened the conference and at his “meet the press” Q&A just before lunch. The keynote was entitled Bridges to the Gigascale Decade. And the presentation certainly contained lots of photos of bridges! Anyway, I’m going to focus on just one thing,… Read More
New ways for High Frequency Analysis of IC Layouts
Amidst frequently changing requirements, time pressure and demand for high accuracy, it is imperative that EDA and design companies look at time consuming processes in the overall design flow and find alternatives without losing accuracy. High Frequency Analysis of IC designs is one such process which is traditionally based… Read More
A New Mixed-Signal IC Router
Pure digital routers for IC designs have an easier task than mixed-signal routers, because mixed-signal routers have more constraints like:
- Shielded buses
- Differential pairs
- Twisted pairs
- Matched RC routing
- 20nm technology rules
- Double Patterning Technology (DPT)
Moore and Beyond: Global Semiconductor Primer
There are a couple of new analyst reports out that are interesting enough to blog about. I talk to the financial types on the phone every week or so explaining the semiconductor business and answering questions about the foundries and the top fabless companies. We don’t always agree on the outlook but there is always something to … Read More
Can Samsung Deliver As Promised?
Samsung’s aggressive marketing is starting to hit the fabless semiconductor ecosystem so we had all better be prepared. Samsung’s 2012 marketing budget exceeded $400M which probably beats the marketing budget of the entire fabless ecosystem! The question is, will the fabless semiconductor industry be easily swayed by Samsung’s… Read More
Unlocking the Full Potential of Soft IP
EDA vendors, IP suppliers and Foundries provide an eco-system for SoC designers to use in getting their new electronic products to market quicker and at a lower cost. An example of this eco-system are three companies (TSMC, Atrenta, Sonics) that teamed up to produce a webinar earlier in March called: Unlocking the Full Potential… Read More
A Brief History of Forte Design Systems
When Semiwiki readers see the name Forte Design Systems, they may think of the live bagpipers’ performance that closes the yearly Design Automation Conference. Forte has been the sponsor of this moving end to DAC since 2001. Step with me behind the plaid kilts for a good look at this remarkable company headquartered in San Jose, … Read More
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