You will not believe this, but the family was picking me up Friday evening from the airport and on the way home… Get this, for real, the wife asks me to cut her hair tomorrow. Now the three of you that read my stuff, know what happened before. I resisted, and firmly said ‘No’…The wife seeing my macho stance began appealing to my engineer’s mind as she started talking economics. My dear manly readers, I stayed strong and I am out $50. Best $50 Mr. Miller spent last week…
On my travels, I learned some valuable information. One that Xilinx continues to dominate in execution, performance and design wins, and by the way, Xilinx is REALLY shipping 20nm. I must say the Xilinx competition has revealed how desperate they are, after hearing the claptrap they are pumping into the field. All I can say is “Non dolet, Paete!”
So let’s talk execution, no not the Texas kind, but did you know within hours upon receiving some wafers from TSMC that the Xilinx 20nm UltraScale Gigabit Transceivers were up and running? That is not an accident, but careful design, planning and a relationship with TSMC. The most critical choice of any FPGA company is deciding who is going to build your chips. You can have great tools, architecture and IP but that is nothing without a yielding wafer. Process, Process, process. I had the opportunity of learning ASIC design early on in life and you know what, it’s really, really hard. I would sit in meetings listening to guys with pocket protectors and crooked glasses talk about electrons and poly as if they could see them with the naked eye. Maybe they could, and that’s why the glasses were thick.
So I guess I will go here, but these are valid questions and concerns. Is Intel able to perform as a foundry? What is wrong with asking? Looking at Altera’s earning reports, the cash flowing out does not appear to be great, one could guess 50 million to Intel or even 100 million. That is not a huge amount of dough in the world of Intel, who did around 52.7 billion in sales, and let’s face it, I do not like it, as you don’t as well, but money is power and money gets things done. So, if the 4M Monolithic logic cell FPGAs start to have poor yields, who pays for that? Not just in FPGA cost and screening but how about your design schedule? How about the other Intel production runs that drive the business? Can all play nice? Can you say Errata?
Do I think Intel can pull off 14nm? No doubt, time and money fixes everything but congress. Intel’s 14nm foundry experiment need’s a guinea pig or someone to clean the foundry pipe, and frankly I would rather be the 3[SUP]rd[/SUP] customer on the Intel 14nm foundry process than the first. There is just too much that must be perfect for success to occur. While all this is going on, Xilinx is executing, Xilinx 28nm FPGAs owns more than 70% of the FPGA market, 20nm is cranking away and picking up steam, and 16nm is on deck. Do you expect there to be a hiccup on the Xilinx-TSMC well-oiled machine? Not likely, and that is why Xilinx is not only a better performing FPGA but clearly the safe choice when planning your next design, having the confidence the FPGA will be ready for action, when your design needs it, and errata free.
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TSMC 16th OIP Ecosystem Forum First Thoughts