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Impressions of #51DAC

Impressions of #51DAC
by Paul McLellan on 06-05-2014 at 9:56 am

 So what was the overall theme of DAC this year? Usually there seems to be some trend that is hot. A few years ago it was power, then more recently all the stuff associated with 20nm and 16nm such as FinFETs and double patterning. Those things are still around, of course, and there are new generations of tools.

One theme is that more design is being done at the system level than before. The enabling technology for much of it is emulation. All three major EDA vendors have a good emulation solution. Prior to emulation the modeling problem was too big of a barrier and it was too challenging to keep the system models synchronized with the RTL. Emulation allows the RTL to be used as the model but with enough performance from the emulator to enable system level work, especially that involving software development or running software workloads.

One thing that is shaking things up a bit is Samsung’s foundry strategy. They have a clear commitment to create a foundry ecosystem that is competitive. Of course they had two big announcements in the last few weeks. Firstly was the transfer of their 14nm process to GlobalFoundries so that the identical process will be available from Samsung’s fabs in Korea and Austin and from GlobalFoundries’s fab 8 in Malta New York. Since GlobalFoundries was completely uncompetitive at 28nm it left the field open to TSMC pretty much having a monopoly for a couple of years.

Then there was the announcement that Samsung were licensing FD-SOI from STMicroelectronics. I attended a presentation by Philippe Margashack, the CTO of ST, on the Samsung booth. I already knew a fair bit about FD-SOI since I had to present on it at EDPS this year. It is available for volume production out of ST’s Crolles fab (just south of Grenoble) and will be available from Samsung early in 2015. One thing I hadn’t realized is that since FD-SOI is actually a simpler process than bulk, its cycle time is about 15% less. Another thing I learned was that the back-biasing can be used not just for power/frequency management but also to recenter the process and remove some of the variability.

TSMC were talking about their 16nm FinFET process where all the design enablement is largely complete. They are starting to talk about 10nm and are doing the preliminary work. But they also have a new process and library at 28nm. I guess one mini-theme of DAC is that 28nm is a process node that is going to stick around for a long time since it is cheap, avoids all the double patterning and variability challenges of 20nm, and has large enough capacity for many purposes. The Samsung licensing FD-SOI is another way of extending 28nm and having a better process at the same time.

Another piece of news that broke during the show was that Broadcom are getting out of mobile and selling that part of their business to Huawei. The rise of Chinese companies in mobile is somewhat underappreciated here since they mostly don’t sell in the US. But China is such a huge market on its own.

So no big overall theme for DAC this year. The march of process nodes carries on although it seems that it will be muted, with a lot of design sticking at 28nm and only the most advanced designs going to 14/16nm.

Also read: The Best and Worst of #51DAC!

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