Design engineers frequently struggle with transmission line design and modeling. We can define a length of interconnect that contains more than 1/100th of a wavelength as a transmission line. This seems to be the breakpoint where distributed effects to start to become significant. To improve circuit performance these long … Read More
How Customized Foundation IP Is Redefining Power Efficiency and Semiconductor ROIAs computing expands from data centers to edge…Read More
Akeana Partners with Axiomise for Formal Verification of Its Super-Scalar RISC-V CoresAkeana Inc. announced a key milestone in the…Read More
An AI-Native Architecture That Eliminates GPU InefficienciesA recent analysis highlighted by MIT Technology Review…Read More
Caspia Technologies Unveils A Breakthrough in RTL Security Verification Paving the Way for Agentic Silicon SecurityIn a significant advancement for the semiconductor industry,…Read More
Designing the Future: AI-Driven Multi-Die Innovation in the Era of Agentic EngineeringAt the 2026 Chiplet Summit, Synopsys presented a…Read MoreCadence white paper helps you selecting what come after DDR4
The DRAM market is shaking… In 2014, analysts predict that LPDDR4 will surpass DDR4 for the first time. When releasing DDR4 standard, JEDEC has clearly stated that the industry should not expect any DDR5. Does this means that DRAM technology new development is ending with DDR4? According with Mike Howard, principal analyst at … Read More
Automatic RTL Restructuring: A Need Rather Than Convenience
In the semiconductor design industry, most of the designs are created and optimized at the RTL level, mainly through home grown scripts or manual methods. As there can be several iterations in optimizing the hierarchy for physical implementation, it’s too late to do the hierarchical optimizations after reaching the floor plan… Read More
Cadence and Reverse Debugging
I wrote back in March about Undo Software. They have a reverse debugging solution called UndoDB (the DB is for debug, not database). I have a soft spot for reverse debugging ever since seeing one of the engineers at Virtutech type reverse single step and seeing the code back up a single instruction and realizing that literally months… Read More
Crossfire – Your partner for IP development, what’s new?
As the SoCs and IPs grow in sizes and complexities, the number of formats, databases, libraries of standard cells and IOs also increase. It becomes a clumsy task to check every cell in a library, its consistency among various format with respect to functionality, timing, naming, labels and so on, and its complex physical properties… Read More
Synopsys Earnings
The perfect quarterly results are to slightly beat the consensus for earnings and profit, and not say anything negative about guidance for the upcoming quarter. Synopsys delivered all that with their latest quarter yesterday. Revenue was $521M versus $483M last year, giving solid growth of over 8%. Non-GAAP earnings per share… Read More
Develop High Performance Machine Vision in the Blink of an Eye
The growing capabilities of silicon along with improved algorithms means that machine vision is becoming increasingly important since more and more systems can be built in such areas as manufacturing, intelligent traffic management, bar code scanning, counterfeit detection and even sports simulation. Is that a 3X driver?… Read More
Substrate coupling analysis method and tool
There has been a lot written on this topic, and some expensive tools proposed to solve this issue, but it is still a concern and a mystery for many designers. The point is that whatever efforts you do, the substrate is common to an entire chip and can cause some undesired coupling if not managed properly and at an early stage. As a start… Read More
EDA Ice Bucket Challenge!
In case you have not heard, the Ice Bucket Challenge is a social media program aiming to increase the awareness of ALS (Amyotrophic lateral sclerosis AKA Lou Gehrig’s Disease). One of our neighbors recently passed away as a result of ALS so this challenge is dedicated to Barbara Letts. After hearing about the challenge my daughter… Read More
Silvaco News: Silicon Valley, China and Korea
Silvaco is one of the sponsors of the GSA Executive Forum to be held over in VC Land at the Rosewood Sand Hill on September 10th. Note that it starts at 11.45am with a networking lunch.
- The featured keynote speakers are Fareed Zakariah and Rana Faroohar, both of CNN. Rana is also Senior Managing Editor of Time.
- The first panel session


Memory Matters: Signals from the 2025 NVM Survey