eSilicon, in conjunction with King Research, is conducting an unusual survey. A lot of vendor-driven surveys focus on specific pain points that are addressed by that particular vendor’s product/service. The idea is typically to either promote visibility for the product/service or establish its undeniable need in the market.… Read More
What Apple Talked About on 9/9/2014
In America the popular press talks almost non-stop about: Disasters, politicians, celebrities and Apple. Yes, Apple. Today I watched the live cast of the new Apple product announcements.
iPhone 6
First, the see things differently video started playing, then the live stream died so I had to turn over to CNET where they were live … Read More
Intel CEO Misinformed on the Foundry Business
At the Citi Global Technology Conference last week Intel (INTC) CEO Brian Krzanich made some comments about the foundry business that I found quite misinformed. It will be interesting to see if this theme is repeated during the foundry presentations at the Intel Developer Forum in San Francisco this week:
Intel is presenting two… Read More
A Comprehensive Power Analysis Solution for SoC+Package
Since power has become a critical factor in semiconductor chip design, the stress is towards decreasing supply voltage to reduce power consumption. However, the threshold voltage to switch devices cannot go down beyond a certain limit and these results in an extremely narrow margin for noise between the two. And that gets further… Read More
What Does Intel Look Like 10 Years From Now?
Intel (INTC) CEO Brian Krzanich keynoted the Citi Global Technology Conference last week. This was a precursor to the Intel Developer Forum in San Francisco this week. Normally these types of events are scripted dog and pony shows but sometimes interesting information comes out. The first question for example:
What does Intel… Read More
Design & EDA Collaboration Advances Mixed-Signal Verification through VCS AMS
Last week it was a rare opportunity for me to attend a webinar where an SoC design house, a leading IP provider and a leading EDA tool provider joined together to present on how the tool capabilities are being used for advanced mixed-signal simulation of large designs, faster with accuracy. It’s always been a struggle to combine design… Read More
EDA Plus ARM Equals Big Views!
In looking at the SemiWiki analytics, one of the top search terms that brings traffic to our site is ARM, just about anything ARM. In fact, that’s what the next SemiWiki book will be about. Yes, ARM is that interesting. While EDA is also one of our top search terms, EDA+ARM will get the most views, absolutely. And let’s face it, bloggers… Read More
TSMC OIP: Registration Open
It’s that time of year again! The 4th TSMC Open Innovation Platform Ecosystem Forum is coming up on September 30th. As usual it is in the San Jose conference center. The TSMC OIP Ecosystem Forum brings together TSMC’s design ecosystem companies and their customers to share real case solutions to today’s design challenges.… Read More
Kilimanjaro
For several weeks I have been trying to put out one blog per day rather than being like London buses where there are none for ages and then three come along at once. Or SFMuni buses for that matter. This week has been more of the same. Well, OK, I skipped labor day because…labor day. All you IC types will be busy eating chips not designing… Read More
SmartScan Addresses Test Challenges of SoCs
With advancement of semiconductor technologies, ever increasing sizes of SoCs bank on higher densities of design rather than giving any leeway towards increasing chip area and package sizes; a phenomenon often overlooked. The result is – larger designs with lesser number of pins bonded out of ever shrinking package sizes;… Read More
Real men have fabs!