18 months ago Renesas announced they were prototyping their SG-MONOS eFlash on 28nm, and at the time we said it would be a couple of years before actual product. Yesterday, Renesas revealed their partner in this effort is TSMC – no surprise – and hinted things are moving, with better performance than expected but on a longer qualification… Read More
The 71st International Electron Devices Meeting (IEDM 2025)It is hard to believe this conference is…Read More
TSMC’s 2026 AZ Exclusive Experience Day: Bridging Careers and Semiconductor InnovationIn February of 2026, Taiwan Semiconductor Manufacturing Company…Read More
DAC – The Chips to Systems Conference 2026The Design Automation Chips to Systems Conference is…Read More
Taming Advanced Node Clock Network Challenges: JitterClock jitter rarely fails in obvious ways. In…Read More
Five Things To See at DVCon India 2016
DVCon is an annual Design and Verification Conference that started out in Silicon Valley, then expanded by adding India as a new location. Our semiconductor design and verification world is global in stature, so if you’re living in the region then consider registering for this event held Thursday and Friday, September … Read More
Petahertz Electronics?
In the early days of integrated components, we used to think kHz (~10[SUP]3[/SUP]Hz) processing was pretty wild. Those systems were quickly eclipsed by MHz (~10[SUP]6[/SUP]Hz) performers and now we’re blasé about GHz (~10[SUP]9[/SUP]Hz) speeds. Recently (2014), DARPA announced a THz (~10[SUP]12[/SUP]Hz) amplifier, built… Read More
TSMC Fab 12 is a Pokemon Go Stop!
It only seems fitting that Fab 12 is a PokeStop since TSMC stands to make a lot of money from the augmented reality gaming craze that is sweeping the world. Unfortunately, most of the press I have read about Pokemon Go has been negative but that is the new “negative media” world we live in. As a player myself (level 25) and a semiconductor… Read More
Time for U.S. Fatality Reduction Targets
Almost exactly a year ago I wrote a blog implicating the insurance industry in the high level of highway fatalities in the U.S. As part of that blog (“The Insurance Industry Has Blood on Its Hands”) I suggested that the National Highway Traffic Safety Administration ought to look into developing a fatality-reduction… Read More
Is Your Next Reality Going to be Augmented?
John Lennon reportedly once said “Reality leaves a lot to the imagination…” and now we have the technology to do something about making our reality a lot more imaginative. Unless you have been living under a rock (and there is nothing wrong with that – I just haven’t found the right rock myself) there is a LOT going on these days in the… Read More
AMD Zen and the Art of Microprocessor Maintenance
AMD is a fantastic company with highly talented people, but for some reason just hasn’t managed to put a winning streak of microprocessor architectures back-to-back. It’s frustrating to watch: they ride like mad to catch up to or even pull slightly ahead of Intel, then fall back in the pack when they have to make an extended pit stop,… Read More
The Role of IP Selection and Integration in First-Time Silicon Success
As IP expert Eric Esteve has written, Semiconductor IP has consistently outgrown the other design enablement segments and will continue to do so. This has been my personal experience as well during my EDA and IP career so we should all know how important Semiconductor IP is. We certainly know how valuable it is with ARM valued at $32B!… Read More
Three Steps for Custom IC Design Migration and Optimization
Popular companies designing smart phones, CPUs, GPUs and Memory components all employ teams of custom IC designers to create the highest performance chips that are as small as possible, and at the lowest costs. How do they go about doing custom IC design migration and optimization when moving from one process node to another one?… Read More
A new world of 10nm design constraints
Every time the industry transitions to a smaller process node IC design software undergoes extensive updates.
I talked to a couple of experts in physical design at Mentor Graphics about what is involved in making place-and-route software ready for a new node. This is what I learned from Sudhakar Jilla, the IC design marketing director… Read More
The Risk of Not Optimizing Clock Power