Synopsys Announces Expanding AI Capabilities and EDA AI LeadershipIn the fast-paced semiconductor industry Synopsys has redefined…Read More
Webinar Preview – Addressing Functional ECOs for Mixed-Signal ASICsAn engineering change order, or ECO in the…Read More
The Rise, Fall, and Rebirth of In-Circuit Emulation (Part 1 of 2)Introduction: The Historical Roots of Hardware-Assisted Verification The…Read More
Tessent MemoryBIST Expands to Include NVRAMThe concept of built-in self-test for electronics has…Read More
The Importance of Productizing AI. Everyday ExamplesKeeping up with the furious pace of AI…Read More
This summer, I got the opportunity to work as a Formal Verification Intern with Axiomise for six weeks. I’m a keen designer and love working in design and architecture. Although, I’ve not started my professional career yet, I have done most of my projects as a designer in my undergraduate and postgraduate studies.
Having said that,… Read More
I first remember blogging about EDA in the cloud starting back in 2011, so what’s changed in the last 10 years you may ask? In 2011, it was basically a handful of EDA point tools running batch mode in the cloud, and you were on your own to integrate those into a coherent flow, so expect help from the CAD and IT departments for sure.… Read More
If you ascribe to the notion that things move in circles, or concentrically, the move to die-to-die connectivity makes complete sense. Just as multi-chip modules (MCM) were the right technology decades ago to improve power, areas, performance and cost, the use of chiplets with die-to-die connections provides many advantages… Read More
I met Andy Grove on a sunny day in New York City in 1987. He was dashing to press interviews for his just-off-the-presses management book, “One on One with Andy Grove.” I was a freshly badged member of the press working for IEEE Spectrum, a year or so out of college, still toting my college backpack. Little did I know that that would be … Read More
Moderator:
Daniel Nenni, Semiwiki
Panelists:
Jothy Rosenberg, CEO Dover Microsystems
John Terry, CEO Espre Technologies
Fares Mubarak, CEO Spark Microsystems
General Theme: A discussion around the requirements and challenges of investigation and ultimate selection of IP for early-stage chip companies, discussing both… Read More
I would contend there is no job quite like working as a support engineer for a simulation tool like Ansys HFSS. Such a role forces an engineer to understand technology in breadth and depth like no other because HFSS is applied to such a broad range of applications and products throughout the world. My own introduction to HFSS began … Read More
I’ve spent most of my career in the ASIC business. In 2003, Gartner predicted the ASIC market would grow to $16.9B. During that time, there were a number of startups building ASICs, but the applications were a bit specialized and aimed at new markets. Consequently, there was a lot of risk to build a chip startup and many ASICs either… Read More
The ferroelectric effect in materials has been exploited to fabricate (fab) reliable Ferroelectric Random Access Memories (FRAM) Non-Volatile Memory (NVM) ICs for over 20 years. Recent years have seen have seen a breakthrough in discovering ferroelectric properties in Hafnium Oxide (HfO2 or “hafnia”), a fab-friendly… Read More
A couple of weeks ago, I blogged on GlobalFoundries’ silicon technologies supporting automotive radar applications. This time it is on GlobalFoundries’ silicon photonics technology which expects to find adoption in a broad spectrum of applications. The blog is based on listening to a technology presentation made by Dr. … Read More
While systems design underpins the explosion in “smart everything”, it remains somewhat isolated from another explosion—the proliferation of tools for application lifecycle management (ALM). ALM tools are prevalent on the web, in the cloud and on our phones, to streamline product design and build, to track correspondence… Read More
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Rapidus, IBM, and the Billion-Dollar Silicon Sovereignty Bet