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Dan is joined by Mike Ingster from Quantum Leap Solutions (QLS) and Ken Potts from Alphacore. Mike and Ken explain how QLS and Alphacore collaborate to provide industry-leading IP and system solutions to their mutual customers. The markets served by both QLS and Alphacore are discussed and the synergies are explained in this informative… Read More
Koen Verhaege, CEO of Sofics (“Solutions for ICs”), has developed his career first as an engineer, later as a business leader and entrepreneur, working on IP development and valorisation. Koen’s technical accomplishments, publications and patents are in the field of on-chip ESD protection design.
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Many modern processor performance benchmarks rely on as many as three levels of cache staying continuously fed. Yet, new data-intensive applications like multithreaded generative AI and 4K image processing often break conventional caching, leaving the expensive execution units behind them stalled. A while back, Semidynamics… Read More
In an era defined by digital transformation and data-intensive applications, the solid-state device (SSD) market has emerged as a critical player in reshaping storage solutions. While there are several types of non-volatile memories, each with its own unique characteristics and use cases, Flash memory is increasingly overtaking… Read More
This webinar will introduce Time-Sensitive Networking (TSN) and unveil how TSN can provide value in aviation, aerospace and defence.
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Large language model (LLM) processing dominates many AI discussions today. The broad, rapid adoption of any application often brings an urgent need for scalability. GPU devotees are discovering that where one GPU may execute an LLM well, interconnecting many GPUs often doesn’t scale as hoped since latency starts piling up with… Read More
The crystalline structure of silicon delivers the incredible capabilities that have fueled the exponential increases defined by Moore’s Law. It turns out that silicon in its purest form will fall short at times – power handling and speed are examples. In these cases, adding additional materials to the silicon can enhance its … Read More
Perforce recently hosted a webinar on “IP Lifecycle Management for Chiplet-Based SoCs”, presented by Simon Butler, the GM for the Methodics IPLM BU. The central theme was trust, for IPs as much as chiplets. How can an IP/chiplet consumer trust that what they receive has not been compromised somewhere in the value chain from initial… Read More
More than two years ago, Synopsys launched its AI-driven design space optimization (DSO.ai) capability. It is part of the company’s Synopsys.ai EDA suite, an outcome of its overarching AI initiative. Since then, DSO.ai has boosted designer productivity and has been leveraged for 270 production tape-outs. DSO.ai uses machine… Read More
Recent articles have focused much effort on studying the stochastic behavior of secondary electron exposure of EUV resists [1-4]. Here, we consider the implications of extending similar treatments to DUV lithography.
As before, the model uses pixel-by-pixel calculations of absorbed photon dose, followed… Read More
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The $725 Million Chip Development: Why Execution Risk, Not IP Cost, Now Dictates Advanced-Node Survival