RVN! 26 Banner revised (800 x 100 px) (600 x 100 px)

Podcast EP335: The Far Reaching Impact of UCIe with Dr. Debendra Das Sharma

Podcast EP335: The Far Reaching Impact of UCIe with Dr. Debendra Das Sharma
by Daniel Nenni on 03-13-2026 at 10:00 am

Daniel is joined by Dr. Debendra Das Sharma, a Senior Fellow and Chief I/O architect in the Data Platforms and Artificial Intelligence Group at Intel. He is a member of the National Academy of Engineering (NAE), Fellow of IEEE, and Fellow of International Academy of AI Sciences. He is a leading expert on I/O subsystem and interface… Read More


Agentic AI and the Future of Engineering

Agentic AI and the Future of Engineering
by Daniel Nenni on 03-13-2026 at 6:00 am

sassine announces agentic ai hires converge 2026

Agentic AI emerges in this Synopsys Converge keynote not as a futuristic add-on, but as a practical response to the growing complexity of engineering. In the speaker’s view, the traditional way of designing chips, systems, and intelligent products is no longer sufficient for the era of physical AI. Engineers are now dealing with… Read More


WEBINAR: Outrunning the Data Wave – Why we need to keep pace with the coming 400% data surge 

WEBINAR: Outrunning the Data Wave – Why we need to keep pace with the coming 400% data surge 
by Daniel Nenni on 03-12-2026 at 10:00 am

A Practical Blueprint for Scaling the Digital Foundation of Silicon Photonics and Co Packaged Optics (1)

The semiconductor manufacturing industry has hit a new era of data intensity. We know that we need to look at alternatives to silicon and that electrical interconnects are unable to keep pace. We know we need to design more chiplets and alter microchip architecture. But how much data are we talking specifically, and how much

Read More

Ravi Subramanian on Trends that are Shaping AI at Synopsys

Ravi Subramanian on Trends that are Shaping AI at Synopsys
by Daniel Nenni on 03-12-2026 at 8:00 am

Ravi Interview Synopsys Converge

Right before the Synopsys Converge Keynote I caught an interview with Ravi Subramanian, Chief Product Management Officer at Synopsys, which highlights several important trends shaping the future of AI, semiconductor technology, and engineering. His discussion focuses on how the worlds of silicon design and system engineering… Read More


Axiomise Introduces nocProve to Transform NoC Design Verification

Axiomise Introduces nocProve to Transform NoC Design Verification
by Daniel Nenni on 03-12-2026 at 6:00 am

Axiomise Launches nocProve for NoC Verification

Axiomise has recently launched a new verification tool called nocProve which will transform how Network-on-Chip designs are validated in modern hardware development, absolutely.

The tool is designed to be the first configurable formal verification application specifically created for NoC implementations. It addresses… Read More


Qnity and Silicon Catalyst Light a Path to Success at the Chiplet Summit

Qnity and Silicon Catalyst Light a Path to Success at the Chiplet Summit
by Mike Gianfagna on 03-11-2026 at 10:00 am

Qnity and Silicon Catalyst Light a Path to Success at the Chiplet Summit

The Chiplet Summit recently concluded. Multi-die heterogeneous design is a hot topic these days and chiplets are a key enabler for this trend. The conference was noticeably larger this year. There were many presentations and exhibits that focused on areas such as how to design chiplets, what standards are important, how to integrate… Read More


Intel Foundry: How They Got Here and Scenarios for Improvement

Intel Foundry: How They Got Here and Scenarios for Improvement
by Mark Webb on 03-11-2026 at 8:00 am

Intel Foundry How They Got Here and Scenarios for Improvement

How do you get a shortage while not growing???

Intel Announced earnings in January. Then David Zinsner presented updates on business this week. David is open when talking and always shares 2-3 things he probably should not share. Often he shares things some of us know, but we cannot present because it is not public. Then he makes it… Read More


The Next Hurdle AI Systems Must Clear

The Next Hurdle AI Systems Must Clear
by Bernard Murphy on 03-11-2026 at 6:00 am

datacenter surrounded by power plants

AI isn’t having an easy ride. The media and Wall Street swing wildly between extremes on any hint of a shift in AI sentiment. Dickens saw this coming: “It was the best of times, it was the worst of times, it was the age of wisdom, it was the age of foolishness, it was the epoch of belief, it was the epoch of incredulity, it was the season of Read More


Why Your LLM-Generated Testbench Compiles But Doesn’t Verify: The Verification Gap Problem

Why Your LLM-Generated Testbench Compiles But Doesn’t Verify: The Verification Gap Problem
by Admin on 03-10-2026 at 10:00 am

fig1 vg chart

By Vikash Kumar, Senior Verification Architect | Arm | IEEE Senior Member. 

The Problem Every Verification Engineer Recognizes

You ask an LLM to generate a UVM testbench. It produces 25 files. Everything compiles. You run the simulation — and nothing happens. The scoreboard reports zero checks. The slave driver stops after 10… Read More


Advanced Architectures for Hybrid III-V/Silicon Quantum Cascade Lasers

Advanced Architectures for Hybrid III-V/Silicon Quantum Cascade Lasers
by Daniel Nenni on 03-10-2026 at 8:00 am

CAE INL 2025

Mid-infrared (MIR) photonic integrated circuits are emerging as a key technology for applications ranging from environmental monitoring and medical diagnostics to defense and industrial process control. The MIR spectral region, often referred to as the molecular “fingerprint” region, exhibits strong absorption features… Read More