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Scaling Multi-Die Connectivity: Automated Routing for High-Speed Interfaces

Scaling Multi-Die Connectivity: Automated Routing for High-Speed Interfaces
by Kalar Rajendiran on 03-23-2026 at 10:00 am

Bump maps for HBM PHY and HBM memory

This article concludes the three-part series examining key methodologies required for successful multi-die design. The first article [hyperlink to SemiWiki first article] focused on feasibility exploration and early architectural validation, while the second article [hyperlink to SemiWiki second article] discussed… Read More


Beyond Moore’s Law: High-NA EUV Lithography Redefines Advanced Chip Manufacturing

Beyond Moore’s Law: High-NA EUV Lithography Redefines Advanced Chip Manufacturing
by Daniel Nenni on 03-23-2026 at 8:00 am

DSC00975

The imec installation of the ASML EXE:5200 High Numerical Aperture (High NA) extreme ultraviolet (EUV) lithography system at imec represents a pivotal advancement in semiconductor manufacturing and research. This system, installed in imec’s 300 mm cleanroom in Leuven, Belgium, introduces unprecedented lithographic resolution… Read More


Arteris Highlights a Path to Scalable Multi-Die Systems at the Chiplet Summit

Arteris Highlights a Path to Scalable Multi-Die Systems at the Chiplet Summit
by Mike Gianfagna on 03-23-2026 at 6:00 am

Arteris Highlights a Path to Scalable Multi Die Systems at the Chiplet Summit

At the recent Chiplet Summit, presentations, discussions and general participation could be broken down into a few broad categories. There were presentations of actual chiplet designs, either as building blocks or end products. There were presentations regarding design tools and methodologies to support and accelerate … Read More


CEO Interview with Moti Margalit of SonicEdge

CEO Interview with Moti Margalit of SonicEdge
by Daniel Nenni on 03-22-2026 at 2:00 pm

SonicEdge Moti Margalit

Moti Margalit is the CEO and co-founder of SonicEdge, a deep-tech pioneer reinventing sound through ultrasonic modulation – unlocking smaller, vibration-free speakers with studio-quality audio.

With a background in lasers and electro-optics, Moti transitioned from technologist to inventor. His career spans 150+ patents… Read More


Podcast EP336: How Quadric is Enabling Dramatic Improvements in Edge AI with Veer Kheterpal

Podcast EP336: How Quadric is Enabling Dramatic Improvements in Edge AI with Veer Kheterpal
by Daniel Nenni on 03-20-2026 at 10:00 am

Daniel is joined by Dr. Veer Kheterpal. Veer has founded three technology companies and possesses full-stack expertise spanning software to silicon across edge and datacenter applications. Currently, he is the CEO & co-founder of Quadric, a semiconductor IP licensing company that delivers the blueprints for efficient,… Read More


Captain America: Can Elon Musk Save America’s Chip Manufacturing Industry?

Captain America: Can Elon Musk Save America’s Chip Manufacturing Industry?
by Jonah McLeod on 03-20-2026 at 6:00 am

Elon Musk Lip Bu Tan Wafer Deal

Intel has posted three consecutive years of falling revenue and an $18.76 billion loss in 2024 alone—and the U.S. government has handed it tens of billions of dollars to fix the problem. The government money isn’t fixing the real issue, which isn’t technical. It’s cultural. Intel got slow, political, and risk-averse—the… Read More


WEBINAR: Reclaiming Clock Margin at 3nm and Below

WEBINAR: Reclaiming Clock Margin at 3nm and Below
by Daniel Nenni on 03-19-2026 at 2:00 pm

Webinar Blog Image Reclaiming Clock Margin

At 3nm and below, clock networks have quietly become the dominant limiter of SoC power, performance, and yield. Yet most advanced-node designs still rely on abstraction-based signoff methodologies developed when voltage headroom was generous and interconnect effects were secondary.

That assumption no longer holds

As supply… Read More


WEBINAR: HBM4E Advances Bandwidth Performance for AI Training

WEBINAR: HBM4E Advances Bandwidth Performance for AI Training
by Don Dingee on 03-19-2026 at 10:00 am

HBM advantage in AI training

The rapid proliferation of LLMs and other AI applications, and of high-end GPU platforms that run them, is putting intense pressure on the performance requirements for memory technologies. Designers need to be keenly aware of how to make the most of their memory and controller choices, which can be moving targets given the rapid… Read More


Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Design Enablement

Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Design Enablement
by Mike Gianfagna on 03-19-2026 at 8:00 am

Siemens Wins Best in Show Award at Chiplet Summit and Targets Broad 3D IC Enablement

The recent Chiplet Summit in Santa Clara was buzzing with new designs and new design methods. It felt like the industry had turned a corner at this year’s event with lots of new technology and design success on display. Siemens EDA had a large presence at the show and took home the Best in Show Award for Packaging Design. There were a … Read More


Siemens Fuse EDA AI Agent Releases to Orchestrate Agentic Semiconductor and PCB Design

Siemens Fuse EDA AI Agent Releases to Orchestrate Agentic Semiconductor and PCB Design
by Bernard Murphy on 03-19-2026 at 6:00 am

Fuse Agentic System

Though terminology sometimes get fuzzy, consensus holds that an agent manages a bounded task with control through a natural language interface. An agentic orchestrator, itself an agent, manages a more complex objective requiring reasoning through multi-step actions and is responsible for orchestrating those actions. By… Read More