In the fast-paced world of AI development, bridging the gap from trained models to production-ready applications can feel like an eternity. Enter Semidynamics’ newly launched Inferencing Tools, a game-changing software suite designed to slash deployment times on the company’s Cervell RISC-V Neural Processing… Read More
A Six-Minute Journey to Secure Chip Design with CaspiaHardware-level chip security has become an important topic…Read More
Lessons from the DeepChip Wars: What a Decade-old Debate Teaches Us About Tech EvolutionThe competitive landscape of hardware-assisted verification (HAV) has…Read More
Think Quantum Computing is Hype? Mastercard Begs to DisagreeJust got an opportunity to write a blog…Read More
TSMC Kumamoto: Pioneering Japan's Semiconductor RevivalIn the lush landscapes of Kumamoto Prefecture, on…Read MoreAdding Expertise to GenAI: An Insightful Study on Fine-Tuning
I wrote earlier about how deep expertise, say for high-quality RTL design or verification, must be extracted from in-house know-how and datasets. In general, such methods start with one of many possible pre-trained models (GPT, Llama, Gemini, etc.). To this consultants or in-house teams add fine-tuning training, initially… Read More
EDA Has a Value Capture Problem — An Outsider’s View
By Liyue Yan (lyan1@bu.edu)
Fact 1: In the Computer History Museum, how many artifacts are about Electronic Design Automation (EDA)? Zero.
Fact 2: The average starting base salary for a software engineer at Netflix is $219K, and that number is $125K for Cadence; the starting base salary for a hardware engineer at Cadence is $119K… Read More
WEBINAR: How PCIe Multistream Architecture is Enabling AI Connectivity
In the race to power ever-larger AI models, raw compute is only half the battle. The real challenge lies in moving massive datasets between processors, accelerators, and memory at speeds that keep up with trillion-parameter workloads. Synopsys tackles this head-on with its webinar, How PCIe Multistream Architecture is Enabling… Read More
A Six-Minute Journey to Secure Chip Design with Caspia
Hardware-level chip security has become an important topic across the semiconductor ecosystem. Thanks to sophisticated AI-fueled attacks, the hardware root of trust and its firmware are now vulnerable. And unlike software security, an instantiated weakness cannot be patched. The implications of such vulnerabilities are… Read More
Lessons from the DeepChip Wars: What a Decade-old Debate Teaches Us About Tech Evolution
The competitive landscape of hardware-assisted verification (HAV) has evolved dramatically over the past decade. The strategic drivers that once defined the market have shifted in step with the rapidly changing dynamics of semiconductor design.
Design complexity has soared, with modern SoCs now integrating tens of billions… Read More
Think Quantum Computing is Hype? Mastercard Begs to Disagree
Just got an opportunity to write a blog on PQShield, and I’m delighted for several reasons. Happy to work with a company based in Oxford and happy to work on a quantum computing-related topic, which you’ll find I will be getting into more deeply over coming months. (Need a little relief from a constant stream of AI topics.) Also important,… Read More
Video EP11: Meeting the Challenges of Superconducting Quantum System Design with Mohamed Hassan
TSMC Kumamoto: Pioneering Japan’s Semiconductor Revival
In the lush landscapes of Kumamoto Prefecture, on Japan’s Kyushu Island, TSMC is etching a new chapter in global chip production. The TSMC Kumamoto facility, operationalized through its wholly-owned subsidiary Japan Advanced Semiconductor Manufacturing (JASM), represents the Taiwanese giant’s bold foray… Read More
AI RTL Generation versus AI RTL Verification
I should admit up front that I don’t have a scientific answer to this comparison, but I do have a reasonably informed gut feel, at least for the near-term. The reason I ask the question is that automated RTL generation grabs headlines with visions of designing chips through natural language prompts, making design widely accessible.… Read More



AI RTL Generation versus AI RTL Verification