Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/ces-2026-intel-core-ultra-series-3-debuts-as-first-built-on-intel-18a.24300/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2030770
            [XFI] => 1060170
        )

    [wordpress] => /var/www/html
)

CES 2026: Intel Core Ultra Series 3 Debuts as First Built on Intel 18A

Daniel Nenni

Admin
Staff member
Intel ushers in the next generation of AI PCs with exceptional performance, graphics and battery life; available this month.

NEWS HIGHLIGHTS:
  • First platform built on Intel 18A: At CES 2026, Intel launched the Intel® Core™ Ultra Series 3 processors, the first compute platform built on Intel 18A - the most advanced semiconductor process ever developed and manufactured in the United States.

  • Powering over 200 PC designs: Series 3 includes a robust family of mobile processors, delivering exceptional performance, graphics and battery life.

  • From PC to Edge: For the first time, Series 3 processors are tested and certified for embedded and industrial use cases at the edge like robotics, smart cities, automation, healthcare and more.
LAS VEGAS--(BUSINESS WIRE)-- Today at CES, Intel unveiled Intel® Core™ Ultra Series 3 processors, the first AI PC platform built on Intel 18A process technology that was designed and manufactured in the United States. Powering over 200 designs from leading, global partners, Series 3 will be the most broadly adopted and globally available AI PC platform Intel has ever delivered.

This press release features multimedia. View the full release here: https://www.businesswire.com/news/home/20260105738564/en/

An Intel® Core™ Ultra series 3 processor. (Credit: Intel Corporation)

An Intel® Core™ Ultra series 3 processor. (Credit: Intel Corporation)
“With Series 3, we are laser-focused on improving power efficiency, adding more CPU performance, a bigger GPU in a class of its own, more AI compute and app compatibility you can count on with x86.” – Jim Johnson, Senior Vice President and General Manager, Client Computing Group, Intel

Series 3 Adds a New Class of Intel Core Ultra X9 and X7 Processors
Within the Intel Core Ultra Series 3 mobile lineup, a new class of Intel Core Ultra X9 and X7 processors come packed with the highest performing, integrated Intel® Arc™ graphics. They are purpose-built for multitaskers that handle advanced workloads like gaming, creation and productivity on the go. The top SKUs feature up to 16 CPU cores, 12 Xe -cores and 50 NPU TOPS, delivering up to 60% better multithread performance1, over 77% faster gaming performance2 and up to 27 hours of battery life3.

The Series 3 family also includes Intel Core processors, intentionally designed to power mainstream mobile systems. Leveraging the same foundational architecture of Intel Core Ultra Series 3, the Intel Core lineup enables more performant and efficient laptop designs at lower price points.

Series 3 Accelerates AI Adoption in Robotics, Smart Cities, Automation and Healthcare
For the first time, alongside their PC counterparts, Series 3 edge processors are certified for embedded and industrial use cases, including extended temperature ranges, deterministic performance, and 24x7 reliability.

Intel Core Ultra Series 3 delivers competitive advantages in critical edge AI workloads with up to 1.9x higher large language model (LLM) performance4, up to 2.3x better performance per watt per dollar on end-to-end video analytics5, and up to 4.5x higher throughput on vision language action (VLA) models6. The integrated AI acceleration enables superior total cost of ownership (TCO) through a single system on chip (SoC) solution versus traditional multi-chip CPU and GPU architectures.

Availability
Pre-orders for the first consumer laptops powered by Intel Core Ultra Series 3 processors will begin Jan. 6, 2026. Systems will be available globally starting Jan. 27, 2026, with additional designs coming throughout the first half of the year.

Edge systems powered by Intel Core Ultra Series 3 will be available starting Q2 2026.

About Intel
Intel (Nasdaq: INTC) designs and manufactures advanced semiconductors that connect and power the modern world. Every day, our engineers create new technologies that enhance and shape the future of computing to enable new possibilities for every customer we serve. Learn more at intel.com.
 
Intel is laying down the iGPU guantlet in their slides:

"82% faster than AMD HX 370", while consuming less power: 45W vs 53W sustained
and
"10% faster than Nvidia RTX 4050 mobile", while consuming 25% less power (45W v 60W sustained)

That should put Panther Lake neck and neck with the 256-bit bus AMD Strix Halo (AMD Ryzen AI Max 395).

I want to see third party reviews, but if true -- this is very impressive.
 
I just mentioned it to my colleagues. I think it is a better device for students. They don't need to access the free tier of Colab anymore. It is also thin and light and all day bettery life.
 
LEGO have just debut "Smart Brick"

INTEL can take a back seat , unless LEGO are using INTEL to fabricate their chips obviously
 
Intel is laying down the iGPU guantlet in their slides:

"82% faster than AMD HX 370", while consuming less power: 45W vs 53W sustained
and
"10% faster than Nvidia RTX 4050 mobile", while consuming 25% less power (45W v 60W sustained)

That should put Panther Lake neck and neck with the 256-bit bus AMD Strix Halo (AMD Ryzen AI Max 395).

I want to see third party reviews, but if true -- this is very impressive.
Get the chip size.
Then we can get the basic idea of 18A process cost with it's gross margain report.
 
Get the chip size.
Then we can get the basic idea of 18A process cost with it's gross margain report.
I don't think it will be that simple. The compute tile is 18A the graphics tile is either 3nm or TSMC and the platform controller tile is TSMC. Then there is the added cost of Foveros bonding as well. So only a fraction of the cost of manufacturing is going to be 18A.
 
I don't think it will be that simple. The compute tile is 18A the graphics tile is either 3nm or TSMC and the platform controller tile is TSMC. Then there is the added cost of Foveros bonding as well. So only a fraction of the cost of manufacturing is going to be 18A.
i think 18A is going to be the costliest of the bunch considering die size the base die is 22nm FFL and is cost optimized so 274mm2 22nmFFL die vs 114mm2 18a Die i wouldn't be suprised 18A being way more costly
 
Last edited:
i think 18A is going to be the costliest of the bunch considering die size the base die is 22nm FFL and is cost optimized so 274mm2 22nmFFL die vs 114mm2 18a Die i wouldn't be suprised 18A being way more costly
I'm sure that is true, but my point is that you have 4 different die rolled up into one package. Without knowing what kind of pricing Intel is getting from TSMC it will be hard to make an accurate cost estimate of just the 18A portion of the die.
While I'm far from being an accountant I'm also not sure if you will be able to break out the ramp costs from the actual manufacturing cost. Initial cost during ramp is going to be a lot higher than just the manufacturing cost of the process.
 
I'm sure that is true, but my point is that you have 4 different die rolled up into one package. Without knowing what kind of pricing Intel is getting from TSMC it will be hard to make an accurate cost estimate of just the 18A portion of the die.
While I'm far from being an accountant I'm also not sure if you will be able to break out the ramp costs from the actual manufacturing cost. Initial cost during ramp is going to be a lot higher than just the manufacturing cost of the process.
agreed RAMP is going to be costlier initially but Intel will spread it over multiple products on 18A over a longer period of time
 
I don't think it will be that simple. The compute tile is 18A the graphics tile is either 3nm or TSMC and the platform controller tile is TSMC. Then there is the added cost of Foveros bonding as well. So only a fraction of the cost of manufacturing is going to be 18A.
We have a model with scenarios for the cost of Panther Lake ... and depending on yield scenario, 18A is dominant in the cost (reminder the wafer cost is still VERY high compared to goal). It will be margin headwind throughout 2026 using GAAP accounting. I expect some one time writeoffs due to the 18A ramp issues.

Shout out to @siliconbruh999 for Information and inputs on Panther lake and Nova Lake SKUs....

Question: Why did Intel Choose the large GPU to be on TSMC N3, and the Small GPU to be in Intel 3?
 
Legitimately curious as to what you base this statement on. I seem to recall Zinsner indicating they still had some work to do on cost, but don't recall him saying anything about how far from target they are.
I have a model for the goal and I have a model for how things are actually going on outs per tool and total volume in Oregon and in Arizona. I will wait for Intel announcements at earnings before I publish results.

Some things we know from publc comments:
1) 18A volume is low, full ramp of Fab 52 does not happen until late in the year.
2) Yields (Overall, not just wafer probe) are low, we have scenarios for what impacts are.
3) Net impact to margins is negative for at least first half of year. Not sure who will take the hit.... product group or IFS..... I hope they do not change accounting again.
4) 18A doesnt plan to hit cost goals until 2027

I expect other updates from Intel at earnings announcement, I will wait for those to come out and discuss impacts after that.
 
Both NVIDIA and AMD had some pretty dramatic "launches" on the hardware side at CES as well. In my mind, the most significant are the NVIDIA Inference Context Memory Storage Platform (huge for inference system co-optimization), and the new racks from both companies, Vera Rubin NVL72 (and beyond), and Helios (AMD).



 
Question: Why did Intel Choose the large GPU to be on TSMC N3, and the Small GPU to be in Intel 3?
N3E is better suited for iGPU is both denser and more performant than Intel 3 has better PPA overall
I have a model for the goal and I have a model for how things are actually going on outs per tool and total volume in Oregon and in Arizona. I will wait for Intel announcements at earnings before I publish results.

Some things we know from publc comments:
1) 18A volume is low, full ramp of Fab 52 does not happen until late in the year.
2) Yields (Overall, not just wafer probe) are low, we have scenarios for what impacts are.
3) Net impact to margins is negative for at least first half of year. Not sure who will take the hit.... product group or IFS..... I hope they do not change accounting again.
4) 18A doesnt plan to hit cost goals until 2027
i knew about 1 as for Yields don't have exact number but the issue is parametric not D0 as for 3 i would think IFS will take the hit but maybe they can shuffle margins here and there it's within their power
I expect other updates from Intel at earnings announcement, I will wait for those to come out and discuss impacts after that.
you got my curiosity now :)
 
N3E is better suited for iGPU is both denser and more performant than Intel 3 has better PPA overall

i knew about 1 as for Yields don't have exact number but the issue is parametric not D0 as for 3 i would think IFS will take the hit but maybe they can shuffle margins here and there it's within their power

you got my curiosity now :)
Its just end of year and it is LBTs first chance to make major financial changes. I dont know what they will announce. There are some product roadmap changes and those are leaking out slowly over time.

On Margins... IN THEORY, wafer cost and development/ramp cost impact should hit IFS (they bill product group at market rate). Die yield hit should be taken by product group margins.
As you mention, they could shuffle the margins around.... I have no idea what LBT wants to do. The Market rate pricing is excellent IMO for showing where the cost issues are (IFS).
 
@MKWVentures here is the wild cat lake die size it's 74mm2 18A + N6 PCH
I plugged in your Wildcat lake numbers to my cost model. Still playing with the specifics but the cost estimate is ~50% of lowest Panther lake sku and should be reasonable replacement of Alder Lake and Raptor lake skus..... assuming 18A wafer cost to product group is "market price" .... IFS takes hit on ramp and development costs as they ramp and do not pass them to product group. I was surprised. Your Actual Mileage May Vary
 
Back
Top