TSMC and Flex Logix?

There was a lot to learn at the TSMC Technical Symposium last week, in the keynotes for sure but also in the halls and exhibits. Tom Dillinger did a nice job covering the keynotes in his posts Key Take aways from the TSMC Technology Symposium Part 1 and Part 2 but there was something interesting that many people may have missed in the exhibit hall.

As you may know this event is invitation only and that includes the companies who exhibit. To exhibit you must have a formal relationship with TSMC and more importantly with TSMC’s top customers so it interesting to see new companies in the exhibit hall and speculate why they are there.

The most interesting new company exhibiting this year in my opinion was Flex Logix Technologies:

“Architects, front-end designers and physical design teams all need to become familiar with this new technology for applications from MCU to IOT to Networking and more. Like with any technology, it is best to learn by doing and starting simple,” explained Flex Logix CEO and co-founder Geoff Tate. “This new program allows customers to fully evaluate EFLX in detail and in silicon at very low cost.”

Geoff Tate and Andy Jaros manned the booth (Andy and I worked at Virage Logic together years ago). Talking to both the CEO and VP of sales was a great opportunity to understand the Flex Logix value proposition so here it goes:

More and more companies are trying to build flexibility into their SoC designs. The traditional approach has been to overdesign an SoC or functional block to try and anticipate all possible requirements and simply select an option: blow a fuse, spin a metal mask, or make a bond out option to “personalize” a particular chip for a customer or market application.

The theory goes, with advanced process nodes, gates are “cheap”, so this design philosophy is easily justifiable. But what is not cheap are the mask costs not to mention the engineering and validation cost. And there’s the cost of missing a market window if a spec changes or a customer decides they want to tweak a custom built hardware accelerator because their algorithm changed or they want to modify the pinout due to system constraints.

As market requirements and customer demands are changing even more rapidly, designing SoCs with more flexibility in mind is making more and more financial sense. Even if it uses a few more “cheap” gates, can save money on multiple tape outs, and helps keep up with changing requirements.

It requires a slightly different approach to designing chips of course and Flex Logix has the right idea with their Fast Track program to help architects and designers experiment with adding more flexibility to their projects. Additionally, the ability to have one die that can be retargeted to multiple applications improves ROI.

Additionally, the ability to upgrade features in the field, in system, offers the possibility of a new revenue stream: providing optional upgrades that permit better, faster operation. Often the alternative is to fall back to emulation in software which can suck up a lot of processor bandwidth (not to mention power) that can be used elsewhere.

For more detailed information, Don Dingee is our embedded design expert and he has written about Flex Logix twice thus far. Or you can give Andy a ring, he is always good company for a coffee or lunch.

Creating a better embedded FPGA IP product

Reconfigurable redefined with embedded FPGA core IP

FLEX LOGIX, founded in March 2014, provides solutions for reconfigurable RTL in chip and system designs using embedded FPGA IP cores and software. The company’s technology platform delivers significant customer benefits by dramatically reducing design and manufacturing risks, accelerating technology roadmaps, and bringing greater flexibility to customers’ hardware. Flex Logix recently secured $7.4 million of venture backed capital. It is headquartered in Mountain View, California and has sales rep offices in China, Europe, Israel, Taiwan and Texas. More information can be obtained at http://www.flex-logix.com