As the number one 56thDAC supporting portal we will publish what’s happening in the conference, on the exhibit floor, and outside activities. The SemiWiki bloggers will be out in full force with live coverage and behind the scenes looks. Remember, SemiWiki bloggers are actual semiconductor professionals with hundreds of years of combined experience. There is no media team out there that loves DAC more than we do, absolutely.
ClioSoft is also a longtime DAC and SemiWiki supporter and let me tell you ClioSoft CEO Srinath Anantharaman does not spare the DAC expense:
ClioSoft DAC Demo Description
Join us at the 56th Design Automation Conference (DAC) in Las Vegas, NV in booth #927 to learn about our industry standard SoC design and IP management solutions that are tailormade for the semiconductor industry.
- SOS7 platform is the design collaboration system of choice for analog, RF, digital and mixed-signal designs at over 300 companies such as Analog Devices, arm, Cadence, Google, Mediatek and TSMC.
- designHUB platform, launched two years ago, successfully enables companies in making IP reuse a reality within their enterprise.
Re-using Your IPs To Develop SoCs Faster
- What internal or 3[SUP]rd[/SUP] party IPs are available for use within the company?
- How can I search and compare IPs, review their usage and resolve any questions with the IP developers prior to selecting the IP?
- Can I review the experience of other designers using this IP before using it?
- How can I track and prevent the unauthorized usage of 3[SUP]rd[/SUP] party IPs?
The designHUB platform empowers you to easily search for IPs across your company, compare the results, review their issues across hierarchies, qualify and select the desired IP for your project. Collaborate with your fellow team members and keep them in-sync during the development phase of your SoC and leverage the existing IP knowledgebase to resolve any IP issues in a timely manner. On completion, publish your SoC or parts of it into the IP repository with the desired access controls. In this demo, you can learn how to track the IPs and their usage throughout your enterprise, set up checks to prevent IP theft and leverage a live and growing knowledge-base for better efficiency.
Managing And Reusing Your Analog IPs Successfully
- Do you want to browse for IPs from the Cadence Virtuoso platform based on certain criteria such as libraries, process nodes, foundries etc.?
- Do you want to download a version of an IP into your workspace, make the necessary modifications and publish it, directly from Cadence Virtuoso?
- Do you want to track the usage of the analog IPs and its variations throughout the company?
- Do you want receive notifications on changes made to the IPs used in your project?
This demo will explain how to collaborate easily with different teams to develop and publish your analog IPs directly from the Cadence Virtuoso platform by using the designHUB ecosystem. You will learn how to create, manage and reuse the different versions of IPs for specific PDKs and foundries by using the designHUB platform while leveraging a live and growing knowledge base. See how your team can collaborate efficiently on their analog/mixed signal designs and leverage internally developed resources – semiconductor IPs, flows, scripts etc. to build SoCs successfully within a shorter time.
Managing Your Designs For Successful Tapeouts
- Are you struggling with managing design data from multiple design flows across multiple design centers?
- Do you find it difficult to manage design handoffs between teams of your project?
- Are you spending too much time investigating changes made to the design or wondering whether you have the latest version of the design data?
- Are you blowing up your budget on network storage?
Learn how you can leverage the SOS7 design management platform, already in use by over 300 customers, for collaborating on all analog, RF, digital and mixed-signal designs, to increase their designer productivity and team efficiency. See how SOS7 enables you to manage your designs, track open issues, take snapshots of your design database and provides a non-intrusive way to manage your design handoffs between different teams. Take a look at the different ways SOS7 can keep your data secure and minimize your network storage space used for your project.
Managing Design Traceability For Automotive Electronics
- Are you looking to identify the design modifications made since yesterday?
- Do you want to track what design changes were made to fix this bug?
- Do you want to trace the usage of this IP across your company?
- Which designs have been implemented using this version of the specification?
Want to learn how you can track documents, IPs, issues and their fixes against the IP/SoC implementation? This is the demo for you. See how to view the open issues hierarchically for the IPs, be notified about the fixes, review what changed and track the usage across different SoC implementations. From a design module perspective, see how you can track the usage across different projects and view open issues associated with it or track the various documents and its revisions used during the implementation as well as the issues found against a requirement.
Visual Design Diff
- Does your design team struggle to identify modifications made to the schematic or layout by other team members?
- Are you having problems reviewing the changes in your schematic or layout during ECOs?
Learn to use Visual Design Diff (VDD) to graphically compare different versions of a schematic or layout and to quickly highlight the differences even when the schematic is modified by a RF designer.
The designHUB platform provides a collaborative IP reuse ecosystem for enterprises. With built-in analytics and collaborative tools, designHUB not only improves IP reuse by providing an easy-to-use workflow for designers to leverage their internal resources but it also enables design teams to collaborate efficiently to develop SoCs faster. Enabling designers to be more productive, designHUB tracks and collates all activities for design projects and displays the notifications and tasks assigned in an easy review dashboard.
ClioSoft’s SOS7 design-management platform empowers single or multi-site design teams to collaborate efficiently on complex analog, digital, RF and mixed-signal designs from concept to GDSII within a secure design environment. Tight integration with EDA tools, and an emphasis on performance for data transfer, security and disk space optimization provides a cohesive environment that enables design teams to streamline the development of SoCs. SOS7 facilitates easy design handoffs between teams and mitigates the possibility of design re-spins.
ClioSoft is the pioneer and leading developer of enterprise system-on-chip (SoC) design configuration and enterprise IP management solutions for the semiconductor industry. The company provides two unique platforms that enable SoC design management and IP reuse. The SOS7 platform is the only design management solution for multi-site design collaboration for all types of designs – analog, digital, RF and mixed-signal and the designHUB platform provides a collaborative IP reuse ecosystem for enterprises. ClioSoft customers include the top 20 semiconductor companies worldwide. The company is headquartered in Fremont, CA with sales offices and distributors in the United States, United Kingdom, Europe, Israel, India, China, Taiwan, Korea and Japan.
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