Hardware Configuration Management at DAC 2012

Next month at DAC I plan to visit the ClioSoft booth to get an update on what’s new with hardware configuration management (HCM). Last year I met with Srinath Anantharaman to get an introduction to their company and how their tools are used by both front-end engineers and back-end IC layout designers.

Srinath Anantharaman, ClioSoft CEO

A new product last year called Visual Design Diff proved useful to teams that needed to answer the question, “What Just Changed on my Transistor-Level Schematic?”

This year you can use Visual Design Diff to look at the entire design hierarchy of your chip, quite a leap from just one cell at a time comparisons available last year. Hierarchy is used on every chip design, so I’m eager to see this capability in the tool at DAC.

Many IC design teams use the Cadence Virtuoso schematic capture and layout tools, so ClioSoft has integrated into both the latest OA based tool using Virtuoso 6.x and the previous release of Virtuoso 5.x using CDBA.

Don’t feel left out if you don’t use Cadence tools, because ClioSoft has integrated their HCM tool called SOS with the most popular IC tools like:

• Cadence Virtuoso
• Mentor ICstudio
• Springsoft Laker
• Synopsys Custom Designer

The product demos that I’ve seen show that you access the HCM features by simply clicking a drop-down menu choice for Check-In or Check-Out. Users that I’ve interviewed tell me that their designers come up to speed on using the SOS tool on the same day that it is installed, while the CAD manager responsible for setting it up takes maybe a week to learn it.

Other features to look for in a HCM tool are:

• Version Control
  • Files and directories
• Composite Objects
• Concurrent checkout, branch and merge
• Tagging
• Snapshots
• Work area release management
  • Copy work area
  • Linked work area
  • Isolated or shared
  • Revision search order
  • Rollback changes
  • Hierarchical reference and reuse
• Architecture Choices
  • client-server architecture
  • Remote cache server
  • Smart cache technology
  • Push and pull updates
  • Repository
• User Experience
  • GUI
  • Command line interface
  • Non intrusive
  • Production tested
• Communication and collaboration
  • Collaboration icons
  • Triggers
  • Audit trail
  • Attributes and metrics
  • Integration with bug tracking

Summary
It’s time to add ClioSoft to your list of DAC companies, especially if your team does transistor-level design. There’s a page at the ClioSoft site where you can sign up for a meeting to get your questions answered and learn in more detail.

Other HCM companies at DAC this year are Methodics and IC Manage. As a side note, on Google if you search for “ClioSoft configuration management” you see a paid ad for IC Manage:

We’ve blogged before here at SemiWiki on how IC Manage competes with other companies on the web using competitor names.

Also Read

IC Layout Design at Qualcomm

More Growth in EDA

What Changed On My Transistor-Level Schematic?