Late in January it is DesignCon at the Santa Clara convention center from January 28th-31st. Details are here.
On Tuesday from 11.05 to 11.45 Apache and Ansys will be presenting on Thermal Co-analysis of 3D IC/packages/system. This is being presented by a whole team of people: Stephen Pan, senior product specialist at ANSYS; Norman Chang, VP product development at Apache; Mark Qi Ma, a product engineer at Apache; Gokul Shankaran, a product specialist at ANSYS;Product Specialist, ANSYS; and Manoj Nagulapally, R&D manager at ANSYS.
The title of the paper makes it pretty clear what they will be presenting. Thermal management in 3D-IC designs is critical because the heat can’t easily get out from in the heart of a 3D stack of die. We are used to having to model temperature effects on a single die, but in a stack a hot spot on one die can affect the performance of the die above and below. And, of course, the performance has an affect on the temperature.
Accurate temperature maps on chips have impacts on chip reliability and performance such as EM limits, IR maps, and power distribution. Chip, package, board, and system are all thermally coupled, but with very different length scales. While it is still a challenge to include the details of all the levels in one thermal-analysis model using current technology, an accurate and practical co-analysis flow is presented to help manage thermal problems on 3D-ICs. Apache/ANSYS will describe a methodology in power-thermal co-analysis of 3D-IC packages through power-temperature iterative loops at the chip-package level and power-thermal BC iterative loops involving chip, package, and system (CPS).
Then from 2.50 to 3.30 that same day (Tuesday) Ansys, Intel and the University of South Carolina present Analytic Solutions for Periodically Loaded Transmission Line Modeling. This paper is presented by Paul Huray from University of Southern Carolina, Priva Pathmanathan from Intel and Steve Pytel, the Signal Integrity Product Manager for ANSYS.
Next day, on Wednesday from 11.05 to 11.45 ANSYS presents A Reverse Nyquist Approach to Understanding the Importance of Low-Frequency Information in Scattering Matrices. The paper is presented by Daniel Dvorscak and Michale Tsuk of ANSYS.
High-speed applications require high-frequency (20 GHz+) S-parameter models. While high bandwidth is important, it is also critical to model the behavior accurately at low frequency. When using S-parameter models in circuit simulation, the lack of proper low-frequency content can result in inaccurate results due to the simulator’s lacking enough information to recapture physical properties of the model, such as insertion delay, inter-symbol interference, or the lower knee frequency of discrete passive components. This session will cover the pitfalls of low-frequency undersampling, as well as how to use the duality of time and frequency for predicting the appropriate frequency sampling required when generating individual as well as concatenating models.