FPGAs for a few thousand devices more

An incredibly pervasive trend at last year’s ARM TechCon was the IoT, and I expect this year to bring even more of the same, but with a twist. Where last year was mostly focused on ultra-low power edge devices and the mbed ecosystem, this year is likely to show a better balance of ideas across all three IoT tiers. I also expect a slew of ADAS applications to hit the show.

The two IoT tiers besides the edge – gateway, and infrastructure – have room for bigger, more capable chips with either power-over-Ethernet, or wall power available. ADAS applications have vehicle power to work with, and while they have thermal restrictions limiting power dissipation, we’re also seeing larger chips to handle tasks like embedded vision, radar, and lidar.

Every time I bring up “IoT” and “FPGA” in the same sentence, people pounce. I get it, though my first response is the IoT does not equal edge sensors and actuators and mobile devices. FPGAs don’t fit the power profile of most edge devices, but with fog computing taking on a larger role things are starting to change.

Economically, we have the “a billion is the new million” problem, and the lower volume applications don’t make sense for custom silicon starts. Somebody still has to take care of those applications needing a few thousand devices. In the past, that was often a merchant microprocessor on a COTS single board computer with daughtercard mezzanines to customize I/O requirements.

We’ve also talked a lot about optimization making sense for IoT chip starts, and most FPGA designs don’t seem optimized versus an ASIC solution. Yet, these applications are ripe for solutions such as Xilinx Zynq, combining the benefits of dual core processing with programmable logic. For decades, FPGAs have succeeded at relatively low volume, heavily customized applications such as broadcast video solutions and defense signal processing. Industrial IoT solutions call for low to mid-range volumes in the gateway and infrastructure tiers.

Optimization is an interesting discussion. It gets really hard to optimize things when what you really need is flexibility. With specifications moving around, consortia merging, and market forces still not indicating a clear winner for industrial IoT solutions, FPGAs present an opportunity. Designs can be completed in programmable, accelerated hardware, fielded, and changed quickly to respond to the next customer requirement.

ADAS is a bit more complicated, because there are millions of cars out there and the volumes are attracting merchant chip starts. However, we are seeing the same fragmentation – he who owns the algorithms and the maps will ultimately win. Committing to a strategy, be it GPUs, CNNs, DSPs, or hardware-accelerated instructions, is expensive. It might win a particular customer and completely miss the wants of another. There are questions of differentiation and ecosystems and who is willing to make joint investment instead of demanding NRE.

Experimentation is rife in ADAS space. In a lot of ways, the algorithm scientists own the problem right now. This is almost the case for what John Bruggeman tried to pitch several years ago, where the silicon would self-organize around the software. We’re a long way from ASICs doing that, but development tools such as Xilinx SDSoC taking algorithms directly from C/C++ to FPGA hardware can approximate at least the compute intensive part of the solution.

One of the first press releases to cross my desk for this year’s ARM TechCon is from Aldec, parlaying Zynq technology into both ADAS and IoT applications. They are demonstrating two embedded development kits (EDKs) based on their TySOM family:

• Their ADAS setup has their TySOM2 module plus an FMC with four camera interfaces streaming four First Sensor Blue Eagle cameras, complete with edge detection, colorspace conversion, and frame merging in programmable logic.
• For IoT gateway applications, the TySOM1 is showing off MQTT and Amazon Web Services (AWS) integration with sensors of various protocols connected to the gateway. Aldec has been working with hardware-accelerated encryption for this platform, as well as adding more sophisticated vision sensors.

Also in booth #215, Aldec will be showing co-emulation using ARM Cortex-A15 fast models running SCE-MI. More on the Aldec presence at ARM TechCon:

Aldec to Showcase Xilinx Zynq-based ADAS and IoT Gateway Development Platforms at ARM TechCon 2016

Maker modules took the IoT world by storm because they are only twiddling a few bits with an MCU or dealing with a couple standard I/O ports off a mobile SoC. For the next wave of industrial IoT and ADAS applications, where customization and hardware acceleration of code are differentiators, Aldec and other Zynq-based module suppliers have a better formula.