SiC 800 Jan2025Deadline Static
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Seeking Autonomy

Seeking Autonomy
by Tom Simon on 07-24-2017 at 12:00 pm

I’d wager that if I mention autonomous vehicles, the first thing that you would think of would be autonomous cars. The truth is that we will see many other kinds autonomous vehicles in the years ahead. Their applications will range from package delivery to saving lives on the battlefield. Of course, to some extent they are already… Read More


The Transformation of Silvaco!

The Transformation of Silvaco!
by Daniel Nenni on 07-24-2017 at 7:00 am

Founded in 1984, Silvaco is now the largest privately held EDA company with a rich history including a recent transformation that is worth a blog if not a book. Coincidently, I started my career in Silicon Valley in 1984 and have had many dealings with Silvaco over the years including a personal relationship with Silvaco founder … Read More


Semicon West – The FDSOI Ecosystem

Semicon West – The FDSOI Ecosystem
by Scotten Jones on 07-21-2017 at 12:00 pm

At Semicon West last week I attended presentations by Soitec and CEA Leti, and had breakfast with CEA Leti CEO Marie Semeria, key members of the Fully Depleted Silicon On Insulator (FDSOI) ecosystem. I have also seen some comments in the SemiWiki forum lately that make me believe there is some confusion on the roles of different companies… Read More


IP Diligence

IP Diligence
by Bernard Murphy on 07-20-2017 at 12:00 pm

I hinted earlier that Consensia would introduce at DAC their comprehensive approach to IP management across the enterprise, which they call DelphIP (oracle of Delphi, applied to IP). I talked with Dave Noble, VP BizDev at Consensia to understand where this fits in the design lifecycle.


IP management means a lot of different things.… Read More


Applying ISO 26262 in a Fabless Ecosystem – DAC Panel Discussion

Applying ISO 26262 in a Fabless Ecosystem – DAC Panel Discussion
by Tom Simon on 07-18-2017 at 12:00 pm

The fabless movement was instrumental in disaggregating the semiconductor industry. Vertical product development at the chip and system level has given way to a horizontal structure over the years. This organization of product development has been doing an admirable job of delivering extremely reliable products. However… Read More


NetSpeed’s Pegasus Last-Level Cache IP Improves SoC Performance and Reduces Latency

NetSpeed’s Pegasus Last-Level Cache IP Improves SoC Performance and Reduces Latency
by Mitch Heins on 07-17-2017 at 7:00 am

Memory is always a critical resource for a System-on-Chip (SoC) design. It seems like designers are always wanting more memory, and the memory they have is never fast enough to keep up with the processors, especially when using multi-core processors and GPUs. To complicate matters, today’s SoC architectures tend to share memory… Read More


LETI Days 2017: FD-SOI, Sensors and Power to Sustain Auto and IoT

LETI Days 2017: FD-SOI, Sensors and Power to Sustain Auto and IoT
by Eric Esteve on 07-07-2017 at 7:00 am

I have attended last week to the LETI Days in Grenoble, lasting two days to mark the 50[SUP]th[/SUP] anniversary of the CEA subsidiary. Attending to the LETI Days is always a rich experience: LETI is a research center counting about 3000 research engineers, but LETI is also a start-up nursery. The presentations are ranging from Read More


Overcoming the Challenges of Creating Custom SoCs for IoT

Overcoming the Challenges of Creating Custom SoCs for IoT
by Mitch Heins on 06-30-2017 at 7:00 am

As the Internet of Things (IoT) opportunities continues to expand, companies are working hard to bring System-on-Chip (SoC) solutions to market in the hopes of garnering market share and revenue. However, it’s not as easy as it may first seem. Companies are running into a series of issues that stand between them and capturing the… Read More


DAC 2017: How Oracle does Reliability Simulation when designing SPARC

DAC 2017: How Oracle does Reliability Simulation when designing SPARC
by Daniel Payne on 06-27-2017 at 12:00 pm

Last week at #54DAC there was a talk by Michael Yu from the CAD group of Oracle who discussed how they designed their latest generation of SPARC chips, with an emphasis on the reliability simulations. The three features of the latest SPARC family of chips are:

  • Security in silicon
  • SQL in silicon
  • World’s fastest microprocessor
Read More

The Official SemiWiki #54DAC Party Guide!

The Official SemiWiki #54DAC Party Guide!
by Daniel Nenni on 06-13-2017 at 12:00 pm

With the premier conference for semiconductor design enablement just around the corner I would like to take this time and space to talk about what is really happening at the #54DAC and that would be the parties! Granted the DAC parties are nothing like we used to have in the 1980s and the 1990s since we have matured as an industry but … Read More