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Schematic Capture, Analog Fast SPICE, and Analysis Update

Schematic Capture, Analog Fast SPICE, and Analysis Update
by Daniel Payne on 09-20-2012 at 1:10 pm

At the DAC show in June I met with folks at Berkeley DA and heard about their Analog Fast SPICE simulator being used inside of the Tanner EDA tools. With the newest release from Tanner called HiPer Silicon version 15.23 you get a tight integration between:

  • Schematic Capture using S-Edit
  • Waveform viewing with W-Edit
  • Control and launch Tanner Analog FastSPICE (from Berkeley DA)

The Tanner tools have been around for a few decades now, so they are solid to use and the company is adopting standards like Open Access (OA) from Si2 and the emerging iPDK movement.

As a Tanner user you can still opt for simulating smaller jobs with T-Spice, then add on the Analog FastSPICE option for bigger jobs to get the accurate results back much faster (5 to 10X better than traditional SPICE).

If you design ICs with high voltage, like automotive or industrial designs, then the latest support for HiSIM-HV models will benefit you. AMS designers can now run transient noise analysis on their circuits from S-Edit and view results in W-Edit:

  • ADCs (sigma-delta, pipelined, video, etc.)
  • DACs
  • PLLs (integer-N and fractional-N)
  • Full transmit and receive chains
  • Frequency synthesizers

It makes business sense for Berkeley DA and Tanner EDA to team up and start offering tool flows that are integrated, tested and compete with tools from Cadence, Mentor and Synopsys. If you’re a Tanner EDA user and are thinking about getting faster SPICE circuit simulation results, then consider evaluating these tools for 30 days.

For a comparison on SPICE simulators, view ourWiki page of SPICE and FastSPICE vendors.

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